EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet - Page 30

IC ARM9 SOC ARM920T 272TFBGA

EP9307-CRZ

Manufacturer Part Number
EP9307-CRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9307-CRZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1138

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9307-CRZ
Manufacturer:
ALTERA
0
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/IRZ
Manufacturer:
ALTERA
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Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
Ethernet MAC Interface
STA - Station - Any device that contains an IEEE 802.11 conforming Medium Access Control (MAC) and physical layer
(PHY) interface to the wireless medium.
PHY - Ethernet physical layer interface.
30
TXCLK cycle time
TXCLK high time
TXCLK low time
TXCLK to signal transition delay time
TXCLK rise/fall time
RXCLK cycle time
RXCLK high time
RXCLK low time
RXDVAL / RXERR setup time
RXDVAL / RXERR hold time
RXCLK rise/fall time
MDC cycle time
MDC high time
MDC low time
MDC rise/fall time
MDIO setup time (STA sourced)
MDIO hold time (STA sourced)
MDC to MDIO signal transition delay time
(PHY sourced)
Parameter
Copyright 2010 Cirrus Logic (All Rights Reserved)
Symbol
t
t
t
MDC_high
t
t
MDC_low
t
t
MDC_per
t
t
TX_high
RX_high
t
t
t
t
TX_low
RX_per
RX_low
TX_per
MDIOh
MDIOd
MDIOs
MDCrf
t
t
t
t
t
RXrf
TXd
TXrf
RXs
RXh
10 Mbit
mode
140
140
140
140
160
160
10
10
10
10
0
-
-
-
-
-
-
-
Min
100 Mbit
mode
160
160
14
14
14
14
10
10
10
10
0
-
-
-
-
-
-
-
10 Mbit
mode
400
200
200
400
200
200
400
10
-
-
-
-
-
-
-
-
-
-
Typ
100 Mbit
mode
400
40
20
20
10
40
20
20
-
-
-
-
-
-
-
-
-
-
10 Mbit
mode
260
260
260
260
300
25
5
5
5
-
-
-
-
-
-
-
-
-
Max
100 Mbit
mode
300
26
26
25
26
26
5
5
5
-
-
-
-
-
-
-
-
-
DS667F2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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