C8051F366-GQ Silicon Laboratories Inc, C8051F366-GQ Datasheet - Page 120

• Manufacturer Part Number: C8051F366-GQ
• Description: IC 8051 MCU 32K FLASH 32-LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F366-GQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 29
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 29
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 32LQFP
• Device Core: 8051
• Family Name: C8051F36x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1648

C8051F360/1/2/3/4/5/6/7/8/9
11.6. Rounding and Saturation
A Rounding Engine is included, which can be used to provide a rounded result when operating on frac-
tional numbers. MAC0 uses an unbiased rounding algorithm to round the data stored in bits 31–16 of the
accumulator, as shown in Table 11.1. Rounding occurs during the third stage of the MAC0 pipeline, after
any shift operation, or on a write to the LSB of the accumulator. The rounded results are stored in the
rounding registers: MAC0RNDH (SFR Definition 11.12) and MAC0RNDL (SFR Definition 11.13). The accu-
mulator registers are not affected by the rounding engine. Although rounding is primarily used for fractional
data, the data in the rounding registers is updated in the same way when operating in integer mode.
The rounding engine can also be used to saturate the results stored in the rounding registers. If the
MAC0SAT bit is set to ‘1’ and the rounding register overflows, the rounding registers will saturate. When a
positive overflow occurs, the rounding registers will show a value of 0x7FFF when saturated. For a nega-
tive overflow, the rounding registers will show a value of 0x8000 when saturated. If the MAC0SAT bit is
cleared to ‘0’, the rounding registers will not saturate.
11.7. Usage Examples
This section details some software examples for using MAC0. Section 11.7.1 shows a series of two MAC
operations using fractional numbers. Section 11.7.2 shows a single operation in Multiply Only mode with
integer numbers. The last example, shown in Section 11.7.3, demonstrates how the left-shift and right-shift
operations can be used to modify the accumulator. All of the examples assume that all of the flags in the
MAC0STA register are initially set to ‘0’.
11.7.1. Multiply and Accumulate Example
The example below implements the equation:
MOV
MOV
MOV
MOV
MOV
MOV
MOV
NOP
NOP
NOP
120
Greater Than 0x8000
Less Than 0x8000
Equal To 0x8000
Equal To 0x8000
(MAC0ACC1:MAC0ACC0)
Accumulator Bits 15–0
MAC0CF, #0Ah
MAC0AH, #40h
MAC0AL, #00h
MAC0BH, #20h
MAC0BL, #00h
MAC0BH, #E0h
MAC0BL, #00h
Table 11.1. MAC0 Rounding (MAC0SAT = 0)
; Set to Clear Accumulator, Use fractional numbers
; Load MAC0A register with 4000 hex = 0.5 decimal
; Load MAC0B register with 2000 hex = 0.25 decimal
; This line initiates the first MAC operation
; Load MAC0B register with E000 hex = -0.25 decimal
; This line initiates the second MAC operation
; After this instruction, the Accumulator should be equal to 0,
; and the MAC0STA register should be 0x04, indicating a zero
; After this instruction, the Rounding register is updated
Anything
Anything
Odd (LSB = 1)
Even (LSB = 0)
(
(MAC0ACC3:MAC0ACC2)
0.5 0.25
Accumulator Bits 31–16
×
)
+
(
0.5
×
–
Rev. 1.0
0.25
)
=
0.125 0.125
Up
Down
Up
Down
Rounding
Direction
–
=
0.0
(MAC0ACC3:MAC0ACC2) + 1
(MAC0ACC3:MAC0ACC2)
(MAC0ACC3:MAC0ACC2) + 1
(MAC0ACC3:MAC0ACC2)
(MAC0RNDH:MAC0RNDL)
Rounded Results