C8051F044-GQ Silicon Laboratories Inc, C8051F044-GQ Datasheet - Page 305

IC 8051 MCU 64K FLASH 100TQFP

C8051F044-GQ

Manufacturer Part Number
C8051F044-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F044-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
64
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
Rohs Compliant
Yes
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Data Rom Size
64 KB
A/d Bit Size
10 bit
A/d Channels Available
13
Height
1 mm
Length
14 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
14 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1209

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24. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. PCA0 consists of a dedicated 16-bit counter/timer and
six 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled (See
through 3 and the Priority Crossbar Decoder” on page
mable timebase that can select between six inputs as its source: system clock, system clock divided by
four, system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflow, or
an external clock signal on the ECI line. Each capture/compare module may be configured to operate inde-
pendently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Frequency
Output, 8-Bit PWM, or 16-Bit PWM (each is described in
trolled through the system controller's Special Function Registers. The basic PCA block diagram is shown
in Figure 24.1.
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
SYSCLK/4
ECI
Capture/Compare
Module 1
CLOCK
MUX
PCA
Figure 24.1. PCA Block Diagram
16-Bit Counter/Timer
Capture/Compare
Module 2
Crossbar
Port I/O
Rev. 1.5
C8051F040/1/2/3/4/5/6/7
Section
Capture/Compare
204). The counter/timer is driven by a program-
Module 3
24.2). The PCA is configured and con-
Capture/Compare
Module 4
Section “17.1. Ports 0
Capture/Compare
Module 5
303

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