M30622F8PFP#U9C Renesas Electronics America, M30622F8PFP#U9C Datasheet - Page 158

• Manufacturer Part Number: M30622F8PFP#U9C
• Description: IC M16C MCU FLASH 64K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622F8PFP#U9C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 15.5
Count Start Flag
Up/Down Flag
b7 b6 b5 b4
b7 b6 b5 b4 b3 b2 b1
NOTES :
1.
2.
3.
Jan 10, 2006
Use MOV instruction to w rite to this register.
Make sure the port direction bits for the TA2IN to TA4IN and TA2OUT to TA4OUT pins are set to “0” (input mode).
When not using the tw o-phase pulse signal processing function, set the bit corresponding to Timer A2 to Timer A4 to
“0”.
b3 b2 b1 b0
(1)
TABSR and UDF Registers
b0
Bit Symbol
Bit Symbol
TA0UD
TA1UD
TA2UD
TA3UD
TA4UD
TA0S
TA1S
TA2S
TA3S
TA4S
TB0S
TB1S
TB2S
TA2P
TA3P
TA4P
Page 141 of 390
Symbol
UDF
Symbol
TABSR
Timer A0 Count Start Flag
Timer A1 Count Start Flag
Timer A2 Count Start Flag
Timer A3 Count Start Flag
Timer A4 Count Start Flag
Timer B0 Count Start Flag
Timer B1 Count Start Flag
Timer B2 Count Start Flag
Timer A0 Up/Dow n Flag
Timer A1 Up/Dow n Flag
Timer A2 Up/Dow n Flag
Timer A3 Up/Dow n Flag
Timer A4 Up/Dow n Flag
Timer A2 Tw o-Phase Pulse
Signal Processing Select Bit
Timer A3 Tw o-Phase Pulse
Signal Processing Select Bit
Timer A4 Tw o-Phase Pulse
Signal Processing Select Bit
Bit Name
Bit Name
Address
0384h
Address
0380h
0 : Dow n count
1 : Up count
Enabled by setting the MR2 bit in the TAiMR
register to “0” (=sw itching source in UDF
register) during event counter mode.
0 : tw o-phase pulse signal processing
1 : tw o-phase pulse signal processing
disabled
enabled
0 : Stops counting
1 : Starts counting
(2, 3)
After Reset
Function
After Reset
00h
Function
00h
15. Timers
WO
WO
WO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW