PIC24HJ32GP202-I/SP Microchip Technology, PIC24HJ32GP202-I/SP Datasheet - Page 5

IC PIC MCU FLASH 32K 28DIP

PIC24HJ32GP202-I/SP

Manufacturer Part Number
PIC24HJ32GP202-I/SP
Description
IC PIC MCU FLASH 32K 28DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP202-I/SP

Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
7. Module: UART
8. Module: SPI
9. Module: I
© 2010 Microchip Technology Inc.
When the UART is in 4x mode (BRGH = 1) and
using two Stop bits (STSEL = 1), it may sample the
first Stop bit instead of the second one.
This issue does not affect the other UART
configurations.
Work around
Use the 16x baud rate option (BRGH = 0) and
adjust the baud rate accordingly.
Affected Silicon Revisions
When the SPI module is enabled, setting the
DISSCK bit in the SPIxCON1 register does not
allow the user application to use the SCK pin as a
General Purpose I/O pin.
Work around
None.
Affected Silicon Revisions
The BCL bit in I2CSTAT can be cleared only with
16-bit operation and can be corrupted with 1-bit or
8-bit operations on I2CSTAT.
Work around
Use 16-bit operations to clear BCL.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
X
2
C
A4
A4
A4
X
X
X
PIC24HJ32GP202/204 and PIC24HJ16GP304
A5
A5
A5
X
X
X
A6
A6
A6
X
X
X
10. Module: I
11. Module: Product Identification
12. Module: UART
If there are two I
them is acting as the Master receiver and the other
as the Slave transmitter. Suppose that both
devices are configured for 10-bit addressing
mode, and have the same value in the A10 and A9
bits of their addresses. When the Slave select
address is sent from the Master, both the Master
and Slave acknowledges it. When the Master
sends out the read operation, both the Master and
the Slave enter into Read mode and both of them
transmit the data. The resultant data will be the
ANDing of the two transmissions.
Work around
Use different addresses including the higher two
bits (A10 and A9) for different modules.
Affected Silicon Revisions
Revision A2 devices marked as extended
temperature range (E) devices, support only
industrial temperature range (I).
Work around
Use Revision A3 or newer devices marked as
extended temperature range (E) devices.
Affected Silicon Revisions
The UART error interrupt may not occur, or may
occur at an incorrect time, if multiple errors occur
during a short period of time.
Work around
Read the error flags in the UxSTA register
whenever a byte is received to verify the error
status. In most cases, these bits will be correct,
even if the UART error interrupt fails to occur.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
2
C
A4
A4
A4
X
X
2
C devices on the bus, one of
A5
A5
A5
X
X
A6
A6
A6
X
X
DS80467E-page 5

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