ATTINY25-20SSUR Atmel, ATTINY25-20SSUR Datasheet
ATTINY25-20SSUR
Specifications of ATTINY25-20SSUR
Related parts for ATTINY25-20SSUR
ATTINY25-20SSUR Summary of contents
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... ATtiny25V/45V/85V – 2.7 - 5.5V for ATtiny25/45/85 • Speed Grade – ATtiny25V/45V/85V: 0 – 4 MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATtiny25/45/85: 0 – 10 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Industrial Temperature Range • Low Power Consumption – Active Mode: • ...
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... Pin Configurations Figure 1-1. Pinout ATtiny25/45/85 (PCINT5/RESET/ADC0/dW) PB5 (PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3 (PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4 (PCINT5/RESET/ADC0/dW) PB5 (PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3 (PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4 NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect 1.1 Pin Descriptions 1.1.1 VCC Supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB5:PB0) Port 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability ...
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... Port B also serves the functions of various special features of the ATtiny25/45/85 as listed in “Alternate Functions of Port B” on page On ATtiny25, the programmable I/O ports PB3 and PB4 (pins 2 and 3) are exchanged in ATtiny15 Compatibility Mode for supporting the backward compatibility with ATtiny15. 1.1.4 RESET Reset input ...
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... Overview The ATtiny25/45/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny25/45/85 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...
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... On-chip ISP Flash allows the Program memory to be re-programmed In-System through an SPI serial interface conventional non-volatile memory programmer On-chip boot code running on the AVR core. The ATtiny25/45/85 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators and Evaluation kits. 2586M–AVR–07/10 ...
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... Note that not all AVR devices include an extended I/O map. 3.3 Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ATtiny25/45/85 6 2586M–AVR–07/10 ...
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Register Summary Address Name Bit 7 0x3F SREG I 0x3E SPH – 0x3D SPL SP7 0x3C Reserved 0x3B GIMSK – 0x3A GIFR – 0x39 TIMSK – 0x38 TIFR – 0x37 SPMCSR – 0x36 Reserved 0x35 MCUCR BODS 0x34 MCUSR ...
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... Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. ATtiny25/45/85 8 2586M–AVR–07/10 ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...
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... Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break ATtiny25/45/85 10 Description Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0) Rd(n) ← Rd(n+1), n=0..6 Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0) SREG(s) ← 1 SREG(s) ← ← Rr(b) Rd(b) ← ← ← ← ...
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... These devices can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informa- tion and minimum quantities. 5. For Typical and Electrical characteristics for this device please consult Appendix A, ATtiny25/V Specification at 105°C. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.200" ...
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... Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.200" Wide, Plastic Gull-Wing Small Outline (EIAJ SOIC) 8X 8-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline Package (TSSOP) 20M1 20-pad 0.8 mm Body, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATtiny25/45/85 12 (1) Ordering Code Package ATtiny45V-10PU 8P3 ...
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... All packages are Pb-free, halide-free and fully green and they comply with the European directive for Restriction of Hazard- ous Substances (RoHS). 3. For Speed vs see CC 4. These devices can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informa- tion and minimum quantities. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.200" ...
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... D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ ...
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... Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs aren't included. 3. Determines the true geometric position. 4. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. Package Drawing Contact: packagedrawings@atmel.com 2586M–AVR–07/ ...
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... S8S1 Top View e Side View L End View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums,etc. 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ TITLE S8S1, 8-lead, 0.150" Wide Body, Plastic Gull Wing Small ...
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Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MO-153AC. 2325 Orchard Parkway San Jose, CA 95131 R 2586M–AVR–07/ ...
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... TOP VIEW D2 Pin #1 Notch (0. BOTTOM VIEW Reference JEDEC Standard MO-220, Fig. 1 (SAW Singulation) WGGD-5. Note: 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ TITLE 20M1, 20-pad 0.8 mm Body, Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF) SIDE VIEW A2 ...
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... Errata 8.1 Errata ATtiny25 The revision letter in this section refers to the revision of the ATtiny25 device. 8.1.1 Rev D and E No known errata. 8.1.2 Rev B and C • EEPROM read may fail at low supply voltage / low clock frequency 1. EEPROM read may fail at low supply voltage / low clock frequency Trying to read EEPROM at low clock frequencies and/or low supply voltage may result in invalid data ...
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... Trying to read EEPROM at low clock frequencies and/or low supply voltage may result in invalid data. Problem Fix/Workaround Do not use the EEPROM when clock frequency is below 1 MHz and supply voltage is below 2V. If operating frequency can not be raised above 1 MHz then supply voltage should be ATtiny25/45/85 20 2586M–AVR–07/10 ...
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Similarly, if supply voltage can not be raised above 2V then operating fre- quency should be more than 2 MHz. This feature is known to be temperature dependent but it has not been characterised. Guidelines are given ...
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... If operating frequency can not be raised above 1 MHz then supply voltage should be more than 3V. Similarly, if supply voltage can not be raised above 2V then operating fre- quency should be more than 2 MHz. This feature is known to be temperature dependent but it has not been characterised. Guidelines are given for room temperature, only. ATtiny25/45/85 22 2586M–AVR–07/10 ...
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Errata ATtiny85 The revision letter in this section refers to the revision of the ATtiny85 device. 8.3.1 Rev B and C No known errata. 8.3.2 Rev A • EEPROM read may fail at low supply voltage / low clock ...
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... Datasheet Revision History 9.1 Rev. 2586M-07/10 1. Clarified 2. Added Ordering Codes -SN and -SNR for ATtiny25 extended temperature. 9.2 Rev. 2586L-06/10 1. Added: – TSSOP for ATtiny45 in – – – Extended temperature in – Tape & reel part numbers in Ordering Information Updated: – – – ...
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... COM0B[1:0]: Compare Match Output B Mode” on page 80 “Bits 2:0 – ADTS[2:0]: ADC Auto Trigger Source” on page 142 “SPMCSR – Store Program Memory Control and Status Register” on page “Errata ATtiny25” on page 19 “Errata ATtiny45” on page 20 = 3V)” on page 189 CC = 5V)” ...
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... ATtiny25/45/85 26 “Errata ATtiny85” on page 23 “ATtiny25” on page 11 “ATtiny45” on page 12 “ATtiny85” on page 13 “S8S1” on page 16 “ATtiny25” on page 11 Updated “Low Power Consumption” on page Updated description of instruction length in Updated Flash size in “In-System Re-programmable Flash Program Memory” on page 15. ...
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Rev. 2586I-09/ 10. 11. 12. 13. 9.6 Rev. 2586H-06/ 2586M–AVR–07/10 Updated bit R/W descriptions in: ...
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... Rev. 2586C-06/ ATtiny25/45/85 28 Updated “Internal PLL for Fast Peripheral Clock Generation - clkPCK” on page Updated “Default Clock Source” on page Updated “Low-Frequency Crystal Oscillator” on page Updated “Calibrated Internal Oscillator” on page Updated “Clock Output Buffer” on page Updated “Power Management and Sleep Modes” on page Added “ ...
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Rev. 2586B-05/ 9.13 Rev. 2586A-02/05 Initial revision. 2586M–AVR–07/10 CLKI added, instances of EEMWE/EEWE renamed EEMPE/EEPE, removed some TBD. Removed “Preliminary Description” from Updated “Features” on page 1. Updated Figure 1-1 ...
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