PIC16F631-I/SS Microchip Technology, PIC16F631-I/SS Datasheet - Page 287

• Manufacturer Part Number: PIC16F631-I/SS
• Description: IC PIC MCU FLASH 1KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F631-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 658-1047-5 - BOARD EVALUATION ACCESSTOUCHXLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

F
Fail-Safe Clock Monitor....................................................... 57
Firmware Instructions........................................................ 213
Flash Program Memory .................................................... 119
Fuses. See Configuration Bits
G
General Purpose Register File............................................ 26
I
I
ID Locations ...................................................................... 211
In-Circuit Serial Programming (ICSP) ............................... 211
Indirect Addressing, INDF and FSR registers ..................... 44
Instruction Format ............................................................. 213
Instruction Set ................................................................... 213
© 2006 Microchip Technology Inc.
2
C Mode
Synchronous Master Mode ....................................... 169
Synchronous Slave Mode ......................................... 173
Fail-Safe Condition Clearing ....................................... 57
Fail-Safe Detection ..................................................... 57
Fail-Safe Operation..................................................... 57
Reset or Wake-up from Sleep..................................... 57
Addressing ................................................................ 185
Associated Registers ................................................ 192
Master Mode ............................................................. 191
Mode Selection ......................................................... 184
Multi-Master Mode .................................................... 191
Operation .................................................................. 184
Reception.................................................................. 186
Slave Mode
Transmission............................................................. 189
ADDLW ..................................................................... 215
ADDWF..................................................................... 215
ANDLW ..................................................................... 215
ANDWF..................................................................... 215
BCF........................................................................... 215
BSF ........................................................................... 215
BTFSC ...................................................................... 215
BTFSS ...................................................................... 216
CALL ......................................................................... 216
CLRF......................................................................... 216
CLRW ....................................................................... 216
CLRWDT................................................................... 216
COMF ....................................................................... 216
DECF ........................................................................ 216
DECFSZ.................................................................... 217
Baud Rate Error, Calculating ............................ 161
Baud Rates, Asynchronous Modes .................. 162
Formulas ........................................................... 161
High Baud Rate Select (BRGH Bit) .................. 161
Associated Registers
Reception.......................................................... 171
Requirements, Synchronous Receive .............. 246
Requirements, Synchronous Transmission ...... 246
Timing Diagram, Synchronous Receive ........... 246
Timing Diagram, Synchronous Transmission ... 246
Transmission .................................................... 169
Associated Registers
Reception.......................................................... 174
Transmission .................................................... 173
SCL and SDA pins ............................................ 184
Receive..................................................... 172
Transmit.................................................... 170
Receive..................................................... 174
Transmit.................................................... 173
PIC16F631/677/685/687/689/690
Preliminary
INTCON Register................................................................ 38
Inter-Integrated Circuit (I
Internal Oscillator Block
Internal Sampling Switch (R
Internet Address ............................................................... 289
Interrupts .......................................................................... 204
INTOSC Specifications ..................................................... 239
IOCA Register..................................................................... 62
IOCB Register..................................................................... 70
L
Load Conditions................................................................ 237
M
MCLR ............................................................................... 197
Memory Organization ......................................................... 25
Microchip Internet Web Site.............................................. 289
Migrating from other PICmicro Devices ............................ 281
MPLAB ASM30 Assembler, Linker, Librarian ................... 224
MPLAB ICD 2 In-Circuit Debugger ................................... 225
MPLAB ICE 2000 High-Performance Universal
MPLAB ICE 4000 High-Performance Universal
MPLAB Integrated Development Environment Software.. 223
MPLAB PM3 Device Programmer .................................... 225
MPLINK Object Linker/MPLIB Object Librarian ................ 224
GOTO ....................................................................... 217
INCF ......................................................................... 217
INCFSZ..................................................................... 217
IORLW ...................................................................... 217
IORWF...................................................................... 217
MOVF ....................................................................... 218
MOVLW .................................................................... 218
MOVWF.................................................................... 218
NOP.......................................................................... 218
RETFIE..................................................................... 219
RETLW ..................................................................... 219
RETURN................................................................... 219
RLF........................................................................... 220
RRF .......................................................................... 220
SLEEP ...................................................................... 220
SUBLW..................................................................... 220
SUBWF..................................................................... 221
SWAPF..................................................................... 221
XORLW .................................................................... 221
XORWF .................................................................... 221
Summary Table ........................................................ 214
INTOSC
ADC .......................................................................... 111
Associated Registers................................................ 206
Context Saving ......................................................... 207
Interrupt-on-Change ................................................... 60
Interrupt-on-change .................................................... 69
PORTA/PORTB Interrupt-on-Change ...................... 205
RA2/INT.................................................................... 204
TMR0........................................................................ 205
TMR1.......................................................................... 86
Internal...................................................................... 197
Data ............................................................................ 26
Program...................................................................... 25
In-Circuit Emulator.................................................... 225
In-Circuit Emulator.................................................... 225
Specifications ................................................... 239
2
C). See I
SS
) Impedance ..................... 116
2
C Mode
DS41262C-page 285