ATMEGA48PA-PU Atmel, ATMEGA48PA-PU Datasheet - Page 39

• Manufacturer Part Number: ATMEGA48PA-PU
• Description: MCU AVR 4KB FLASH IND 28PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48PA-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• On-chip Dac: 10 bit, 6 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9. Power Management and Sleep Modes
9.1
Table 9-1.
Notes:
8271C–AVR–08/10
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
Extended
Standby
Sleep Modes
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT1 and INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
F i g u r e 8 - 1 o n p a g e 2 6
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P, and their distribution. The figure is helpful
in selecting an appropriate sleep mode.
up sources BOD disable ability.
Note:
To enter any of the six sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or Extended
Standby) will be activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
”BOD Disable(1)” on page 40
X
1. BOD disable is only available for ATmega48PA/88PA/168PA/328P.
X
X
X
X
X
X
(2)
Oscillators
X
X
X
X
(1)
X
X
X
X
(2)
(2)
(2)
(2)
for more details.
p r e s e n t s t h e d i f f e r e n t c l o c k s y s t e m s i n t h e
Table 9-1
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
shows the different sleep modes, their wake
X
X
X
X
X
X
Wake-up Sources
Table 9-2 on page 44
X
X
X
X
(2)
X
X
X
X
for a summary.
X
X
X
X
X
X
X
X
X
X
X
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