PIC16LC433-I/P Microchip Technology, PIC16LC433-I/P Datasheet - Page 46

• Manufacturer Part Number: PIC16LC433-I/P
• Description: IC MCU CMOS 8BIT 10MHZ 2K 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC433-I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: POR, WDT
• Number Of I /o: 6
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC16C433
8.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 8-2. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 8-2.
ance for analog sources is 10 k . After the analog
input channel is selected (changed), this acquisition
must be done before the conversion can be started.
To calculate the minimum acquisition time, Equation 8-1
may be used. This equation assumes that 1/2 LSb error
is used (512 steps for the A/D). The 1/2 LSb error is the
maximum error allowed for the A/D to meet its specified
resolution.
EQUATION 8-1:
V
or
Tc = -(51.2 pF)(1 k + R
Example 8-1 shows the calculation of the minimum
required acquisition time T
based on the following system assumptions.
Rs = 10 k
1/2 LSb error
V
Temperature (system max.) = 50 C
V
FIGURE 8-2:
DS41139A-page 44
HOLD
DD
HOLD
= 5V
= (V
= 0 @ t = 0
A/D Sampling Requirements
REF
Rss = 7 k
The maximum recommended imped-
- (V
S
) and the internal sampling switch (R
REF
HOLD
ANALOG INPUT MODEL
Legend: C
/512)) • (1 - e
SS
VA
. The sampling switch (R
A/D MINIMUM CHARGING
TIME
+ R
R
V
I leakage
R
SS
C
S
T
PIN
IC
HOLD
S
) ln(1/511)
ACQ
RA
C
5 pF
HOLD
(-Tc/C
X
PIN
. This calculation is
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
HOLD
) must be allowed
(R
IC
+ R
Advance Information
V
DD
SS
DD
+ R
), see
V
V
T
T
S
SS
SS
))
= 0.6V
= 0.6V
)
)
)
I leakage
± 500 nA
EXAMPLE 8-1:
T
T
T
T
ACQ
ACQ
C
ACQ
R
IC
Note 1: The reference voltage (V
1k
= Internal Amplifier Settling Time +
= 5 s + Tc + [(Temp - 25 C)(0.05 s/ C)]
= -C
= 5 s + 5.724 s + [(50 C - 25 C)(0.05 s/ C)]
Holding Capacitor Charging Time +
Temperature Coefficient
-51.2 pF (1 k + 7 k + 10 k ) ln(0.0020)
-51.2 pF (18 k ) ln(0.0020)
-0.921 s (-6.2146)
5.724 s
10.724 s + 1.25 s
11.974 s
2: The charge holding capacitor (C
3: The maximum recommended impedance
4: After a conversion has completed, a
V
SS R
DD
HOLD
Sampling
Switch
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 k . This is
required to meet the pin leakage specifi-
cation.
2.0 T
acquisition can begin again. During this
time, the holding capacitor is not con-
nected to the selected A/D input channel.
6V
5V
4V
3V
2V
SS
(R
AD
IC
CALCULATING THE
MINIMUM REQUIRED
SAMPLE TIME
Sampling Switch
5 6 7 8 9 10 11
+ R
delay must complete before
V
SS
C
= DAC capacitance
= 51.2 pF
( k
SS
HOLD
2001 Microchip Technology Inc.
+ R
)
S
) ln(1/512)
REF
) has no
HOLD
) is