PIC12C671-04I/P Microchip Technology, PIC12C671-04I/P Datasheet - Page 91

• Manufacturer Part Number: PIC12C671-04I/P
• Description: IC MCU OTP 1KX14 A/D 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C671-04I/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: DIP
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

5.8
1997 Microchip Technology Inc.
PCON Register
bit 7
bit 6:3
bit 2
bit 1
bit 0
The Power Control (PCON) register contains flag bit(s), that together with the TO and PD bits,
allows the user to differentiate between the device resets.
Register 5-3: PCON Register
bit 7
MPEEN: Memory Parity Error Circuitry Status bit
This bit reflects the value of the MPEEN configuration bit.
Unimplemented: Read as '0'
PER: Memory Parity Error Reset Status bit
1 = No error occurred
0 = A program memory fetch parity error occurred
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
MPEEN
Note 1: BOR is unknown on Power-on Reset. It must then be set by the user and checked
Note 2: It is recommended that the POR bit be cleared after a power-on reset has been
(must be set in software after a Power-on Reset occurs)
R-u
on subsequent resets to see if BOR is clear, indicating a brown-out has occurred.
The BOR status bit is a don't care and is not necessarily predictable if the brown-out
circuit is disabled (by clearing the BODEN bit in the Configuration word).
detected, so that subsequent power-on resets may be detected.
U-0
—
W = Writable bit
U-0
—
Section 5. CPU and ALU
U-0
—
- n = Value at POR reset
U-0
—
R/W-0
PER
R/W-0
POR
DS31005A-page 5-9
bit 0
R/W-0
BOR
5