PIC16C433-E/SO Microchip Technology, PIC16C433-E/SO Datasheet - Page 16

• Manufacturer Part Number: PIC16C433-E/SO
• Description: IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C433-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-SOIC (7.5mm Width)
• For Use With: AC164030 - MODULE SKT PROMATEII 28DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC16C433
TABLE 4-1:
DS41139B-page 14
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note 1:
Address
Bank 1
(1)
(1)
(1)
(1)
(1,2)
(1)
2:
3:
4:
INDF
OPTION
PCL
STATUS
FSR
TRIS
PCLATH
INTCON
PIE1
PCON
OSCCAL
ADCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'. Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from either bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are transferred
to the upper byte of the program counter.
Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
The IRP and RP1 bits are reserved on the PIC16C433; always maintain these bits clear.
Name
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PIC16C433 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
GPPU
IRP
CAL3
Bit 7
GIE
—
—
—
—
—
(4)
INTEDG
RP1
CAL2
PEIE
ADIE
Bit 6
—
—
—
—
(4)
GPIO Data Direction Register
T0CS
CAL1
Bit 5
T0IE
RP0
—
—
—
—
Write Buffer for the upper 5 bits of the PC
Preliminary
T0SE
CAL0
INTE
Bit 4
TO
—
—
—
CALFST
GPIE
Bit 3
PSA
PD
—
—
—
CALSLW
PCFG2
Bit 2
T0IF
PS2
—
—
Z
PCFG1
INTF
Bit 1
POR
PS1
DC
—
—
 2002 Microchip Technology Inc.
PCFG0
GPIF
Bit 0
PS0
—
—
—
C
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
--11 1111
---0 0000
0000 000x
-0-- ----
---- --0-
0111 00--
---- -000
Power-on
Value on
Reset
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—
0000 0000
1111 1111
0000 0000
000q quuu
uuuu uuuu
--11 1111
---0 0000
0000 000u
-0-- ----
---- --u-
uuuu uu--
---- -000
RESETS
Value on
all other
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(3)