DSPIC30F2012T-20E/ML Microchip Technology, DSPIC30F2012T-20E/ML Datasheet - Page 205

• Manufacturer Part Number: DSPIC30F2012T-20E/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2012T-20E/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timing Specifications
Trap Vectors ....................................................................... 69
U
UART Module
UART Operation
Unit ID Locations............................................................... 123
Universal Asynchronous Receiver Transmitter
W
Wake-up from Sleep ......................................................... 123
Wake-up from Sleep and Idle ............................................. 70
Watchdog Timer
Watchdog Timer (WDT) ............................................ 123, 133
WWW Address.................................................................. 205
WWW, On-Line Support ....................................................... 9
© 2010 Microchip Technology Inc.
Reset......................................................................... 165
Simple OC/PWM Mode............................................. 171
SPI Module
Type A Timer External Clock .................................... 167
Type B Timer External Clock .................................... 168
Type C Timer External Clock .................................... 168
Watchdog Timer........................................................ 165
PLL Clock.................................................................. 162
Address Detect Mode ............................................... 109
Auto-Baud Support ................................................... 109
Baud Rate Generator................................................ 109
Enabling and Setting Up ........................................... 107
Framing Error (FERR)............................................... 109
Idle Status ................................................................. 109
Loopback Mode ........................................................ 109
Operation During CPU Sleep and Idle Modes .......... 110
Overview ................................................................... 105
Parity Error (PERR) .................................................. 109
Receive Break........................................................... 109
Receive Buffer (UxRXB) ........................................... 108
Receive Buffer Overrun Error (OERR Bit) ................ 108
Receive Interrupt....................................................... 108
Receiving Data.......................................................... 108
Receiving in 8-bit or 9-bit Data Mode........................ 108
Reception Error Handling.......................................... 108
Transmit Break.......................................................... 108
Transmit Buffer (UxTXB)........................................... 107
Transmit Interrupt...................................................... 108
Transmitting Data...................................................... 107
Transmitting in 8-bit Data Mode................................ 107
Transmitting in 9-bit Data Mode................................ 107
UART1 Register Map................................................ 111
UART2 Register Map................................................ 111
Idle Mode .................................................................. 110
Sleep Mode............................................................... 110
(UART) Module ......................................................... 105
Timing Characteristics .............................................. 165
Timing Requirements................................................ 165
Enabling and Disabling ............................................. 133
Operation .................................................................. 133
Master Mode (CKE = 0) .................................... 172
Master Mode (CKE = 1) .................................... 173
Slave Mode (CKE = 0) ...................................... 174
Slave Mode (CKE = 1) ...................................... 176
dsPIC30F2011/2012/3012/3013
DS70139G-page 205