DSPIC30F2011T-20E/ML Microchip Technology, DSPIC30F2011T-20E/ML Datasheet
DSPIC30F2011T-20E/ML
Specifications of DSPIC30F2011T-20E/ML
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DSPIC30F2011T-20E/ML Summary of contents
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... MPLAB ICD 2 Ready The errata described in this section will be addressed in future revisions of dsPIC30F2011 dsPIC30F2012 devices. © 2008 Microchip Technology Inc. dsPIC30F2011/2012 Silicon Errata Summary The following list summarizes the errata described in this document: 1. Malfunction of EMUC2 pin on dsPIC30F2011/2012 On the dsPIC30F2011/2012, the EMUC2 pin is susceptible to negative voltage spikes and requires additional protection ...
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... SDA and SCL pins, causing a false communication start in a single-master configuration or a bus collision in a multi-master configuration. The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. ® DSC ...
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... Adding an accumulator write back (a dummy write back if needed) to either of the MAC class instructions not use the + = address modification not prefetch data from Y data space. © 2008 Microchip Technology Inc. dsPIC30F2011/2012 3. Module: CPU – Instruction DAW.b The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR< ...
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... One may use a large DISI value and then set the DISICNT register to zero, as shown in Example 3. A macro may also be used to perform this task, as shown in Example 4. // protect CPU IPL modification // set CPU IPL remove DISI protection // safely modify the CPU IPL © 2008 Microchip Technology Inc. ...
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... Work around None. However, the user may use a timer interrupt and write to the associated PORT register to control the pin manually. © 2008 Microchip Technology Inc. dsPIC30F2011/2012 7. Module: Output Compare in PWM Mode If the desired duty cycle is ‘0’ (OCxRS = 0), the module will generate a high level glitch ...
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... Sleep mode. Example 5 described above would apply to a dsPIC30F2011 device. ; Ensure flag is reset ; Return from Interrupt Service Routine the function call would be following the or _GotoSleep demonstrates the work around © 2008 Microchip Technology Inc. ...
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... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2008 Microchip Technology Inc. dsPIC30F2011/2012 Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...
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... If the D_A flag and the I2COV flag are both set, a valid data byte was received and a previous valid data byte was lost. It will be necessary to code for handling this overflow condition. © 2008 Microchip Technology Inc slave interrupt 2 C nodes. ...
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... Clock Failure Status bit (OSCCON<3>). If this bit is clear, return from the trap service routine immediately and continue program execution. © 2008 Microchip Technology Inc. dsPIC30F2011/2012 16. Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page ...
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... For example, if the SDA and SCL pins are shared with the UART and SPI pins, and the UART has higher precedence on the port latch pin. DS80273F-page module is that have 2 C © 2008 Microchip Technology Inc. ...
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... Added silicon issues 14 and 15 (I C), and 16 (Timer). Removed silicon issue 8 (Using OSC2/RC15 pin for Digital I/O). Revision F (9/2008) 2 Replaced issues 11 and with issue 19 (I Added silicon issues 15 (PLL Lock Status Bit), 16 (PSV 2 Operations) and 17-19 (I C). © 2008 Microchip Technology Inc. dsPIC30F2011/2012 2 C). DS80273F-page 11 ...
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... NOTES: DS80273F-page 12 © 2008 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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