AT90USB162-16AU Atmel, AT90USB162-16AU Datasheet - Page 19

MCU AVR USB 16K FLASH 32-TQFP

AT90USB162-16AU

Manufacturer Part Number
AT90USB162-16AU
Description
MCU AVR USB 16K FLASH 32-TQFP
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB162-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, PS/2, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/USART/debugWIRE
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATSTK526, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
No. Of I/o's
22
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
SPI, USART
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK526 - KIT STARTER FOR AT90USB82/162ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.3.1
5.3.2
5.3.3
7707F–AVR–11/10
EEPROM Read/Write Access
The EEPROM Address Register – EEARH and EEARL
The EEPROM Data Register – EEDR
For a detailed description of SPI, debugWIRE and Parallel data downloading to the EEPROM,
see
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in
lets the user software detect when the next byte can be written. If the user code contains instruc-
tions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, V
period of time to run at a voltage lower than specified as minimum for the clock frequency used.
See “Preventing EEPROM Corruption” on page 23.
situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
• Bits 15..12 – Res: Reserved Bits
These bits are reserved bits in the AT90USB82/162 and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
512. The initial value of EEAR is undefined. A proper value must be written before the EEPROM
may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
page
257,
CC
is likely to rise or fall slowly on power-up/down. This causes the device for some
15
EEAR7
7
R
R/W
0
X
7
MSB
R/W
0
page
241, and
14
EEAR6
6
R
0
X
R/W
6
R/W
0
page 246
13
EEAR5
5
R
R/W
0
X
5
R/W
0
respectively.
12
EEAR4
4
R
R/W
0
X
4
R/W
0
11
EEAR11
EEAR3
3
R/W
R/W
X
X
3
R/W
0
for details on how to avoid problems in these
Table
5-2. A self-timing function, however,
10
EEAR10
EEAR2
2
R/W
R/W
X
X
2
R/W
0
AT90USB82/162
1
R/W
0
9
EEAR9
EEAR1
1
R/W
R/W
X
X
0
LSB
R/W
0
8
EEAR8
EEAR0
0
R/W
R/W
X
X
EEDR
EEARH
EEARL
19

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