DSPIC30F2023-30I/PTD32 Microchip Technology, DSPIC30F2023-30I/PTD32 Datasheet - Page 2

IC DSPIC MCU/DSP 12K 44-TQFP

DSPIC30F2023-30I/PTD32

Manufacturer Part Number
DSPIC30F2023-30I/PTD32
Description
IC DSPIC MCU/DSP 12K 44-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2023-30I/PTD32

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q4035438

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2023-30I/PTD32
Manufacturer:
Microchip Technology
Quantity:
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Part Number:
DSPIC30F2023-30I/PTD32
Manufacturer:
Microchip Technology
Quantity:
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2.1
In Enhanced ICSP mode, the dsPIC30F SMPS
requires a single programmable power supply for V
Refer to
Timing Requirements”
2.2
Table 2-2
programming. Refer to the appropriate device data
sheet for complete pin descriptions.
2.3
The program memory space extends from 0x0 to
0xFFFFFE. Code storage is located at the base of the
memory map and supports up to 12 Kbytes (4K
instruction words).
program memory size of each device.
TABLE 2-1:
TABLE 2-2:
DS70284C-page 2
MCLR
V
V
PGC
PGD
PGC1
PGD1
PGC2
PGD2
Legend: I = Input, O = Output, P = Power
Note 1:
dsPIC30F1010
dsPIC30F2020
dsPIC30F2023
DD
SS
dsPIC30F SMPS
Pin Name
and AV
and AV
Device
Pins Used During Programming
Program Memory Map
Section 13.0 “AC/DC Characteristics and
Hardware Requirements
lists the pins that are required for
All power supply and ground pins must be connected, including analog supplies (AV
(AV
SS
DD
(1)
SS
(1)
).
CODE MEMORY MAP AND
SIZE
PIN DESCRIPTIONS (PINS USED DURING PROGRAMMING)
Table 2-1
Pin Name
MCLR
PGC1
PGD1
PGC2
PGD2
PGC
PGD
for hardware parameters.
(Size in Instruction Words)
V
V
0x000000-0x000FFE (2K)
0x000000-0x001FFE (4K)
0x000000-0x001FFE (4K)
DD
SS
Code Memory Map
shows the location and
Pin Type
I/O
I/O
I/O
P
P
P
I
I
I
DD
Programming Enable
Power Supply
Ground
Primary Programming Pin Pair: Serial Clock
Primary Programming Pin Pair: Serial Data
Secondary Programming Pin Pair: Serial Clock
Secondary Programming Pin Pair: Serial Data
Tertiary Programming Pin Pair: Serial Clock
Tertiary Programming Pin Pair: Serial Data
.
During Programming
Locations 0x800000 through 0x8005BE are reserved
for executive code memory. This region stores either
the
executive. The programming executive is used for
device programming, while the debug executive is
used for in-circuit debugging. This region of memory
cannot be used to store user code.
Locations 0xF80000 through 0xF8000E are reserved
for the Configuration registers. The bits in these
registers may be set to select various device options,
and are described in
Programming”. The Configuration bits read out
normally, even after code protection is applied.
Locations 0xFF0000 and 0xFF0002 are reserved for
the Device ID registers. These bits can be used by the
programmer to identify which device type is being
programmed and are described in
“Device
after code protection is applied.
Figure 2-2
dsPIC30F SMPS devices.
2.4
The dsPIC30F SMPS family has no data EEPROM.
programming
Data EEPROM Memory
ID”. The device ID reads out normally, even
illustrates the memory map for the
Pin Description
Section 5.7 “Configuration Bits
executive
© 2010 Microchip Technology Inc.
DD
or
) and ground
the
Section 10.0
debugging

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