PIC18F67K22-I/MRRSL Microchip Technology, PIC18F67K22-I/MRRSL Datasheet - Page 3

• Manufacturer Part Number: PIC18F67K22-I/MRRSL
• Description: MCU PIC 128K FLASH XLP 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MRRSL

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3862Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 11
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DM180021, DM183026-2, DM183032, DV164131, MA180028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Silicon Errata Issues
1. Module: Analog-to-Digital Converter
2. Module: Ports
 2010 Microchip Technology Inc.
Note:
The ADC will not meet the Microchip standard
ADC specification. ADC may be usable if tested
at the user end. The possible issues are high off-
set error, high DNL error and multiple missing
codes. The ADC can be tested and used for
relative measurements.
The ADC issues will be fixed in a future revision
of this part.
ADC Offset
The ADC may have a high offset error up to a
maximum of 50 LSB; it can be used if the ADC
is calibrated for the offset.
Work around
Method to Calibrate for Offset:
In Single-Ended mode, connect the ADC +ve
input to ground and take the ADC reading. This
will be the offset of the device and can be used
to compensate for the subsequent ADC read-
ings on the actual inputs.
Affected Silicon Revisions
The input leakage will not match the D060
specification in the data sheet. The leakage will
meet the 200 nA specification at T
T
2 µA.
Work around
None.
Affected Silicon Revisions
A
A3
A3
X
X
= 85ºC, the leakage will be up to a max of
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A3).
(A/D)
A
= 25ºC. At
PIC18F87K22 FAMILY
3. Module: High/Low-Voltage Detect (HLVD)
4. Module: ECCP
5. Module: EUSART
The high-to-low (VDIRMAG = 0) setting of the
HLVD may send initial interrupts. High trip points
that are close to the intended operating voltage
are susceptible to this behavior.
Work around
Select a lower trip voltage that allows consistent
start-up, or clear any initial interrupts from the
HLVD on start-up.
Affected Silicon Revisions
The tri-state setting of the auto-shutdown fea-
ture in the enhanced PWM may not successfully
drive the pin to tri-state. The pin will remain an
output and should not be driven externally. All
tri-state settings will be affected.
Work around
None.
Affected Silicon Revisions
When using the Synchronous Transmit mode of
the EUSART, at high baud rates, transmitted
data may become corrupted. One or more bits of
the intended transmit message may be
incorrect.
Work around
Since this problem is related to the baud rate
used, adding a fixed delay before loading the
TXREGx may not be a reliable work around.
Lower the baud rate until no errors occur, or
when loading the TXREGx, check that the
TRMT bit inside of the TXSTAx register is set
instead of checking the TXxIF bit.The following
code can be used:
while(!TXSTAxbits.TRMT);
// wait to load TXREGx until TRMT is set
Affected Silicon Revisions
A3
A3
A3
X
X
X
DS80507B-page 3