PIC24HJ64GP510-E/PT Microchip Technology, PIC24HJ64GP510-E/PT Datasheet - Page 110

IC PIC MCU FLASH 32KX16 100TQFP

PIC24HJ64GP510-E/PT

Manufacturer Part Number
PIC24HJ64GP510-E/PT
Description
IC PIC MCU FLASH 32KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510-E/PT

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
PIC24HJXXXGPX06/X08/X10
REGISTER 7-32:
DS70175H-page 108
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
U-0
U-0
Unimplemented: Read as ‘0’
C2TXIP<2:0>: ECAN2 Transmit Data Request Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
C1TXIP<2:0>: ECAN1 Transmit Data Request Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
DMA7IP<2:0>: DMA Channel 7 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
DMA6IP<2:0>: DMA Channel 6 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC17: INTERRUPT PRIORITY CONTROL REGISTER 17
DMA7IP<2:0>
C2TXIP<2:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/W-1
R/W-1
© 2009 Microchip Technology Inc.
DMA6IP<2:0>
C1TXIP<2:0>
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0

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