PIC18F2431-I/SO Microchip Technology, PIC18F2431-I/SO Datasheet - Page 282

• Manufacturer Part Number: PIC18F2431-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2431-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
23.5.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read and write data EEPROM
regardless of the protection bit settings.
23.5.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
23.6
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions,
or during program/verify. The ID locations can be read
when the device is code-protected.
23.7
PIC18F2331/2431/4331/4431 microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock and data,
and three other lines for power, ground and the
programming voltage. This allows customers to manu-
facture boards with unprogrammed devices, and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
23.8
When the DEBUG bit in the CONFIG4L Configuration
register is programmed to a ‘0’, the In-Circuit Debugger
functionality is enabled. This function allows simple
debugging functions when used with MPLAB
When the microcontroller has this feature enabled,
some resources are not available for general use.
Table 23-4
background debugger.
TABLE 23-4:
DS39616D-page 282
I/O pins:
Stack:
Program Memory:
Data Memory:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
shows which resources are required by the
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
DEBUGGER RESOURCES
RB6, RB7
2 levels
<1 Kbytes
16 bytes
®
IDE.
Programming. When LVP is enabled, the microcontroller
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
RB7 and RB6. This will interface to the In-Circuit
Debugger module available from Microchip or one of
the third party development tool companies.
23.9
The
(CONFIG4L<2>)
can be programmed without requiring high voltage being
applied to the MCLR/V
then dedicated to controlling Program mode entry and is
not available as a general purpose I/O pin.
LVP is enabled in erased devices.
While programming, using Single-Supply Program-
ming, V
execution mode. To enter Programming mode, V
applied to the PGM pin.
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared and RB5/PGM
becomes available as the digital I/O pin RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required. If a block erase is to
be performed when using Single-Supply Programming,
the device must be supplied with V
PP
Note 1: High-voltage programming is always
pin). Once LVP has been disabled, only the
LVP
DD
2: When Single-Supply Programming is
3: When LVP is enabled externally, pull the
Single-Supply ICSP™
Programming
is applied to the MCLR/V
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
bit
DD
in
enables
. If code-protected memory is to be
PP
 2010 Microchip Technology Inc.
Configuration
SS
pin, but the RB5/PGM pin is
to allow normal program
IHH
Single-Supply
applied to the MCLR/
DD
PP
of 4.5V to 5.5V.
pin as in normal
PP
Register
, V
DD
, V
ICSP
DD
IHH
SS
4L
is
,