DSPIC33FJ64GP310-E/PF Microchip Technology, DSPIC33FJ64GP310-E/PF Datasheet - Page 288

• Manufacturer Part Number: DSPIC33FJ64GP310-E/PF
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP310-E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

dsPIC33FJXXXGPX06/X08/X10
TABLE 25-34: DCI MODULE (MULTI-CHANNEL, I
DS70286C-page 286
AC CHARACTERISTICS
CS10
CS11
CS20
CS21
CS30
CS31
CS35
CS36
CS40
CS41
CS50
CS51
CS55
CS56
Note 1:
Param
No.
2:
3:
4:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
CSCKL
CSCKH
CSCKF
CSCKR
CSDOF
CSDOR
CSDI
COFSF
COFSR
SCOFS
DV
DIV
HCSDI
HCOFS
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
The minimum clock period for CSCK is 100 ns. Therefore, the clock generated in Master mode must not
violate this specification.
Assumes 50 pF load on all DCI pins.
CSCK Input Low Time
(CSCK pin is an input)
CSCK Output Low Time
(CSCK pin is an output)
CSCK Input High Time
(CSCK pin is an input)
CSCK Output High Time
(CSCK pin is an output)
CSCK Output Fall Time
(CSCK pin is an output)
CSCK Output Rise Time
(CSCK pin is an output)
CSDO Data Output Fall Time
CSDO Data Output Rise Time
Clock Edge to CSDO Data Valid
Clock Edge to CSDO Tri-Stated
Setup Time of CSDI Data Input
to
CSCK Edge (CSCK pin is input
or output)
Hold Time of CSDI Data Input to
CSCK Edge (CSCK pin is input
or output)
COFS Fall Time
(COFS pin is output)
COFS Rise Time
(COFS pin is output)
Setup Time of COFS Data Input
to CSCK Edge (COFS pin is
input)
Hold Time of COFS Data Input to
CSCK Edge (COFS pin is input)
Characteristic
(1)
(4)
(3)
(4)
(3)
(4)
(4)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
T
T
CY
CY
2
S MODES) TIMING REQUIREMENTS
Min
/2 + 20
/2 + 20
30
30
10
20
20
20
20
—
—
—
—
—
—
—
Typ
—
—
—
—
10
10
10
10
—
—
—
—
10
10
—
—
(2)
Max
-40°C
25
25
25
25
10
20
25
25
—
—
—
—
—
—
—
—
© 2009 Microchip Technology Inc.
T
Units
A
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
+85°C for Industrial
See Note 1
See Note 1
Conditions
—
—
—
—
—
—
—
—
—
—
—
—
—
—