ATMEGA162V-8PU Atmel, ATMEGA162V-8PU Datasheet - Page 20

• Manufacturer Part Number: ATMEGA162V-8PU
• Description: IC AVR MCU 16K 8MHZ 1.8V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162V-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Changes from Rev.
2513C-09/02 to
Rev. 2513D-04/03
20
ATmega162/V
3. Renamed and updated “On-chip Debug System” to
4. Updated
5. Updated
6. Updated description for the JTD bit on
7. Added note on JTAGEN in
8. Updated Absolute Maximum Ratings* and DC Characteristics in
9. Added a proposal for solving problems regarding the JTAG instruction IDCODE in
1. Updated the
2. Updated
3. Added characterization plots under
4. Added Chip Erase as a first step under
5. Changed CAL7, the highest bit in the OSCCAL Register, to a reserved bit on
6. Changed CPCE to CLKPCE on
7. Corrected code examples on
8. Corrected OCn waveforms in
9. Various minor Timer1 corrections.
10. Added note under
11. Added section
12. Added information about PWM symmetry for Timer0 on
13. Updated
14. Added Figures for
Debug System” on page
istics” on page
“Errata” on page
page
275.
“Programming the EEPROM” on page
and in
writing to the EEPROM during an SPM Page Load.
147.
page
on page
311.
205,
“Register Summary” on page
266.
Table 18 on page 48
“Test Access Port – TAP” on page 197
“Features” on page
Table 18 on page
Table 109 on page
“Ordering Information” on page 310
“EEPROM Write During Power-down Sleep Mode” on page
264.
314.
“Absolute Maximum Frequency as a function of VCC, ATmega162”
“Filling the Temporary Buffer (Page Loading)” on page 224
46.
Table 99 on page
48,
247,
1.
page
and
Figure 52 on page
Table 20 on page
page
Table 112 on page
Table 19 on page
55.
41.
304.
“ATmega162 Typical Characteristics” on page
262.
page
“Programming the Flash” on page 260
207.
233.
regarding JTAGEN.
120.
50,
50.
and
Table 36 on page
267, and
“JTAG Interface and On-chip
page 98
“Packaging Information” on
Table 113 on page
“Electrical Character-
and Timer2 on
77,
2513KS–AVR–07/09
Table 83 on
24.
page 39
about
page
268.
and