AT89C51CC01UA-SLSUM Atmel, AT89C51CC01UA-SLSUM Datasheet - Page 50

IC 8051 MCU FLASH 32K 44-PLCC

AT89C51CC01UA-SLSUM

Manufacturer Part Number
AT89C51CC01UA-SLSUM
Description
IC 8051 MCU FLASH 32K 44-PLCC
Manufacturer
Atmel
Series
AT89C CANr
Datasheet

Specifications of AT89C51CC01UA-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
CAN/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
1280 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT89C51CC01UASLSUM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51CC01UA-SLSUM
Manufacturer:
ATMEL
Quantity:
678
Part Number:
AT89C51CC01UA-SLSUM
Manufacturer:
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Quantity:
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Hardware Security Byte
50
A/T89C51CC01
Table 34. Hardware Security Byte
After erasing the chip in parallel mode, the default value is : FFh
The erasing in ISP mode (from bootloader) does not modify this byte.
Notes:
Number
X2B
Bit
5-3
2-0
7
7
6
1. Only the 4 MSB bits can be accessed by software.
2. The 4 LSB bits can only be accessed by parallel mode.
Mnemonic Description
BLJB
LB2:0
BLJB
X2B
Bit
6
-
X2 Bit
Set this bit to start in standard mode.
Clear this bit to start in X2 mode.
Boot Loader JumpBit
- 1: To start the user’s application on next RESET (@0000h) located in FM0,
- 0: To start the boot loader(@F800h) located in FM1.
Reserved
The value read from these bits are indeterminate.
Lock Bits
5
-
4
-
3
-
LB2
2
LB1
1
4129N–CAN–03/08
LB0
0

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