AT32UC3A364-CTUR Atmel, AT32UC3A364-CTUR Datasheet - Page 40

• Manufacturer Part Number: AT32UC3A364-CTUR
• Description: IC MCU 64KB FLASH 144TBGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-CTUR

• Package / Case: 144-TBGA
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 66MHz
• Number Of I /o: 110
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Core Size: 32-Bit
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, I2S, JTAG, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 4
• Operating Supply Voltage: - 0.3 V to + 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.4.18
8.4.19
8.4.20
32072AS–AVR32–03/09
USB On-The-Go Interface
Timer/Counter
Analog-to-Digital Converter
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Test Modes
Supports Connection of Two Peripheral DMA Controller Channels (PDCA)
Compatible with the USB 2.0 specification
Supports High (480Mbps), Full (12Mbps) and Low (1.5Mbps) speed communication and On-The-
Go
2368 of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
On-Chip UTMI transceiver including Pull-Ups/Pull-downs
On-Chip OTG pad including VBUS analog comparator
Three 16-bit Timer Counter channels
A wide range of functions including:
Each channel is user-configurable and contains:
Internal interrupt signal
Two global registers that act on all three TC channels
Integrated multiplexer offering up to eight independent analog inputs
Individual enable and disable of each channel
Hardware or software trigger
PDC support
Possibility of ADC timings configuration
Sleep mode and conversion sequencer
– Full LIN error checking and reporting
– Frame Slot Mode: the Master allocates slots to the scheduled frames automatically.
– Generation of the Wakeup signal
– Remote Loopback, Local Loopback, Automatic Echo
– Offers Buffer Transfer without Processor Intervention
– Frequency measurement
– Event counting
– Interval measurement
– Pulse generation
– Delay timing
– Pulse width modulation
– Up/down capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– External trigger pin
– Timer counter outputs (corresponding TIOA trigger)
– Automatic wakeup on trigger and back to sleep mode after conversions of all enabled
channels
pipes/endpoints
AT32UC3A3
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