AT32UC3A3128-CTUT Atmel, AT32UC3A3128-CTUT Datasheet - Page 17

• Manufacturer Part Number: AT32UC3A3128-CTUT
• Description: IC MCU 128KB FLASH 144TBGA
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A3128-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TBGA
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, I2S, JTAG, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.2.1
Table 4-5.
4.2.2
Table 4-6.
4.2.3
32072C–AVR32–2010/03
TFBGA144
TFBGA144
K12
L12
J11
J10
Oscillator Pinout
JTAG port connections
Nexus OCD AUX port connections
A7
B7
A8
A9
K5
H6
Oscillator Pinout
JTAG Pinout
Note:
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spective of the GPIO configuration. Three differents OCD trace pin mappings are possible,
depending on the configuration of the OCD AXS register. For details, see the AVR32 UC Tech-
nical Reference Manual.
Table 4-7.
QFP144
QFP144
108
107
105
104
MSEO[1]
MSEO[0]
EVTO_N
1. This ball is physically connected to 2 GPIOs. Software must managed carrefully the GPIO con-
18
19
13
12
98
99
EVTI_N
MDO[5]
MDO[4]
MDO[3]
MDO[2]
MDO[1]
MDO[0]
MCKO
Pin
figuration to avoid electrical conflict
Nexus OCD AUX port connections
VFBGA100
VFBGA100
K5
A5
A6
B7
A7
K9
H7
K6
K8
J8
AXS=0
PB05
PB07
PB06
PA00
PA01
PA03
PA16
PA13
PA12
PA10
PA11
(1)
Pin name
Pin name
PC02
PC03
PC04
PC05
PC00
PC01
TDO
TMS
TCK
TDI
AXS=1
PA08
PX56
PX57
PX58
PA24
PA23
PA22
PA07
PX55
PX00
PB06
AT32UC3A3/A4
Oscillator pin
JTAG pin
XOUT32
XOUT0
XIN32
XIN0
XIN1
XIN1
TDO
TMS
TCK
TDI
AXS=2
PX00
PX06
PX05
PX04
PX03
PX02
PX01
PX08
PX07
PB09
PB06
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