ATXMEGA192D3-AU Atmel, ATXMEGA192D3-AU Datasheet - Page 14

• Manufacturer Part Number: ATXMEGA192D3-AU
• Description: MCU AVR 192K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA192D3-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 192KB (96K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: ATXMEGA
• No. Of I/o's: 50
• Eeprom Memory Size: 2KB
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• Rohs Compliant: Yes
• Processor Series: XMEGA
• Core: AVR
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Operating Supply Voltage: 2.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.7
8134I–AVR–12/10
ATxmega64D3
ATxmega128D3
ATxmega192D3
ATxmega256D3
ATxmega64D3
ATxmega128D3
ATxmega192D3
ATxmega256D3
Devices
Devices
Flash and EEPROM Page Size
Size (Bytes)
128K + 8K
192K + 8K
256K + 8K
64K + 4K
Flash
Size (Bytes)
EEPROM
The Flash Program Memory and EEPROM data memory is organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14
operations are performed on one page at the time, while reading the Flash is done one byte at
the time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant
bits in the address (FPAGE) gives the page number and the least significant address bits
(FWORD) gives the word in the page.
Table 7-2.
Table 7-3 on page 14
EEEPROM write and erase operations can be performed one page or one byte at the time, while
reading the EEPROM is done one byte at the time. For EEPROM access the NVM Address
Register (ADDR[m:n] is used for addressing. The most significant bits in the address (E2PAGE)
gives the page number and the least significant address bits (E2BYTE) gives the byte in the
page.
Table 7-3.
2K
2K
2K
4K
Page Size
(words)
128
256
256
256
Number of words and Pages in the Flash.
Number of bytes and Pages in the EEPROM.
Page Size
FWORD
(Bytes)
Z[7:1]
Z[8:1]
Z[8:1]
Z[8:1]
shows the Flash Program Memory organization. Flash write and erase
32
32
32
32
shows EEPROM memory organization for the XMEGA D3 devices.
FPAGE
Z[16:8]
Z[17:9]
Z[18:9]
Z[18:9]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
E2BYTE
128K
192K
256K
Size
64K
Application
No of Pages
ADDR[10:5]
ADDR[10:5]
ADDR[10:5]
ADDR[11:5]
E2PAGE
256
256
384
512
Size
XMEGA D3
4K
8K
8K
8K
No of Pages
Boot
No of Pages
128
64
64
64
16
16
16
16
14