AT89C51CC01UA-RLTUM Atmel, AT89C51CC01UA-RLTUM Datasheet - Page 21

IC 8051 MCU FLASH 32K 44-VQFP

AT89C51CC01UA-RLTUM

Manufacturer Part Number
AT89C51CC01UA-RLTUM
Description
IC 8051 MCU FLASH 32K 44-VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheet

Specifications of AT89C51CC01UA-RLTUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
2
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44VQFP
Device Core
8051
Family Name
AT89
Maximum Speed
40 MHz
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
VQFP
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT89C51CC01UARLTUM

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Figure 9. Power-down Exit Waveform Using INT1:0#
4129N–CAN–03/08
INT1:0#
OSC
Active phase
2. Generate a reset.
Notes:
Table 14. Pin Conditions in Special Operating Modes
Down(inter
nal code)
(external
(external
(internal
Power-
Power-
Mode
Reset
code)
code)
Down
code)
Idle
Idle
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU
and peripherals. Program execution momentarily resumes with the
instruction immediately following the instruction that activated Power-down
mode and may continue for a number of clock cycles before the internal
reset algorithm takes control. Reset initializes the T89C51CC01 and vectors
the CPU to address 0000h.
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal
3.
Power-down phase
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
RAM content.
Floating
Floating
Floating
Port 0
Data
Data
Port 1
High
Data
Data
Data
Data
Oscillator restart phase
Port 2
High
Data
Data
Data
Data
Port 3
High
Data
Data
Data
Data
Port 4
Active phase
High
Data
Data
Data
Data
ALE
High
High
High
Low
Low
PSEN#
High
High
High
Low
Low
21

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