AT89C51CC01UA-RLTUM Atmel, AT89C51CC01UA-RLTUM Datasheet - Page 33

IC 8051 MCU FLASH 32K 44-VQFP

AT89C51CC01UA-RLTUM

Manufacturer Part Number
AT89C51CC01UA-RLTUM
Description
IC 8051 MCU FLASH 32K 44-VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheet

Specifications of AT89C51CC01UA-RLTUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
2
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44VQFP
Device Core
8051
Family Name
AT89
Maximum Speed
40 MHz
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
VQFP
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT89C51CC01UARLTUM

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Program/Code
Memory
4129N–CAN–03/08
The T89C51CC01 implement 32K Bytes of on-chip program/code memory. Figure 17
shows the partitioning of internal and external program/code memory spaces depending
on the product.
The Flash memory increases EPROM and ROM functionality by in-circuit electrical era-
sure and programming. Thanks to the internal charge pump, the high voltage needed for
programming or erasing Flash cells is generated on-chip using the standard VDD volt-
age. Thus, the Flash Memory can be programmed using only one voltage and allows In-
System-Programming commonly known as ISP. Hardware programming mode is also
available using specific programming tool.
Figure 17. Program/Code Memory Organization
Notes:
1. If the program executes exclusively from on-chip code memory (not from external
2. Default factory programmed parts come with maximum hardware protection. Execu-
memory), beware of executing code from the upper byte of on-chip memory (7FFFh)
and thereby disrupt I/O Ports 0 and 2 due to external prefetch. Fetching code con-
stant from this location does not affect Ports 0 and 2.
tion from external memory is not possible unless the Hardware Security Byte is
reprogrammed. See Table 27.
7FFFh
0000h
32K Bytes
EA = 1
internal
Flash
FFFFh
8000h
32K Bytes
external
memory
7FFFh
0000h
32K Bytes
EA = 0
external
memory
33

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