PIC17C756A-33I/PT Microchip Technology, PIC17C756A-33I/PT Datasheet - Page 154

IC MCU OTP 16KX16 A/D PWM 64TQFP

PIC17C756A-33I/PT

Manufacturer Part Number
PIC17C756A-33I/PT
Description
IC MCU OTP 16KX16 A/D PWM 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756A-33I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
50
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC17
No. Of I/o's
50
Ram Memory Size
902Byte
Cpu Speed
33MHz
No. Of Timers
4
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756A-33I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC17C7XX
15.2.9
To initiate a START condition, the user sets the START
condition enable bit, SEN (SSPCON2<0>). If the SDA
and SCL pins are sampled high, the baud rate genera-
tor is reloaded with the contents of SSPADD<6:0> and
starts its count. If SCL and SDA are both sampled high
when the baud rate generator times out (T
SDA pin is driven low. The action of the SDA being
driven low while SCL is high is the START condition
and causes the S bit (SSPSTAT<3>) to be set. Follow-
ing this, the baud rate generator is reloaded with the
contents of SSPADD<6:0> and resumes its count.
When the baud rate generator times out (T
SEN bit (SSPCON2<0>) will be automatically cleared
by hardware, the baud rate generator is suspended,
leaving the SDA line held low and the START condition
is complete.
FIGURE 15-20:
DS30289B-page 154
Note:
If at the beginning of START condition, the
SDA and SCL pins are already sampled
low, or if during the START condition, the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs.
The Bus Collision Interrupt Flag (BCLIF) is
set, the START condition is aborted and
the I
I
CONDITION TIMING
2
C MASTER MODE START
2
C module is reset into its IDLE state.
Write to SEN bit occurs here.
FIRST START BIT TIMING
SDA
SCL
BRG
BRG
SDA = 1,
SCL = 1
T
), the
), the
BRG
Set S bit (SSPSTAT<3>)
T
S
BRG
At completion of START bit,
Hardware clears SEN bit
15.2.9.1
If the user writes the SSPBUF when a START
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
and sets SSPIF bit.
Note:
T
Write to SSPBUF occurs here.
BRG
1st Bit
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the START
condition is complete.
WCOL Status Flag
T
BRG
2000 Microchip Technology Inc.
2nd Bit

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