AT90USB1287-AU Atmel, AT90USB1287-AU Datasheet
AT90USB1287-AU
Specifications of AT90USB1287-AU
AT90USB1287-16AU
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AT90USB1287-AU Summary of contents
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... Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode – Two16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode ® 8-Bit Microcontroller 8-bit Microcontroller with 64/128K Bytes of ISP Flash and USB Controller AT90USB646 AT90USB647 AT90USB1286 AT90USB1287 Summary 7593KS–AVR–11/09 ...
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Real Time Counter with Separate Oscillator – Four 8-bit PWM Channels – Six PWM Channels with Programmable Resolution from Bits – Output Compare Modulator – 8-channels, 10-bit ADC – Programmable Serial USART – Master/Slave SPI Serial ...
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Pin Configurations Figure 1-1. 1 (INT.6/AIN.0) PE6 2 (INT.7/AIN.1/UVcon) PE7 3 UVcc UGnd 7 UCap 8 VBus 9 (IUID) PE3 10 (SS/PCINT0) PB0 11 (PCINT1/SCLK) PB1 12 (PDI/PCINT2/MOSI) PB2 13 (PDO/PCINT3/MISO) PB3 14 (PCINT4/OC.2A) ...
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Figure 1-2. (INT.6/AIN.0) PE6 (INT.7/AIN.1/UVcon) PE7 (SS/PCINT0) PB0 (PCINT1/SCLK) PB1 (PDI/PCINT2/MOSI) PB2 (PDO/PCINT3/MISO) PB3 (PCINT4/OC.2A) PB4 (PCINT5/OC.1A) PB5 (PCINT6/OC.1B) PB6 Note: 1.1 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured ...
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AT90USB64/128 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1. Block Diagram PF7 - PF0 VCC POR TF DRIVERS GND DATA REGISTER PORT F AVCC ADC ...
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... Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel AT90USB64/128 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The AT90USB64/128 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emula- tors, and evaluation kits ...
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Pin Descriptions 2.2.1 VCC Digital supply voltage. 2.2.2 GND Ground. 2.2.3 AVCC Analog supply voltage. 2.2.4 Port A (PA7..PA0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output ...
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Port E (PE7..PE0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E ...
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XTAL2 Output from the inverting Oscillator amplifier. 2.2.19 AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con- nected to V through a low-pass filter. 2.2.20 AREF This is the ...
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Register Summary Address Name Bit 7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) OTGTCON (0xF8) UPINT (0xF7) UPBCHX - (0xF6) UPBCLX (0xF5) UPERRX - (0xF4) UEINT (0xF3) ...
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Address Name Bit 7 (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) TCNT2 (0xB1) TCCR2B ...
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Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB ADHSM (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) XMCRB XMBK (0x74) XMCRA SRE (0x73) Reserved - (0x72) Reserved - (0x71) TIMSK3 - (0x70) TIMSK2 ...
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Address Name Bit 7 0x1B (0x3B) PCIFR - 0x1A (0x3A) Reserved - 0x19 (0x39) Reserved - 0x18 (0x38) TIFR3 - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) Reserved - 0x13 (0x33) Reserved - ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr ADC Rd, Rr ADIW Rdl,K SUB Rd, Rr SUBI Rd, K SBC Rd, Rr SBCI Rd, K SBIW Rdl,K AND Rd, Rr ANDI Rd Rd, ...
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Mnemonics Operands BRVC k BRIE k BRID k BIT AND BIT-TEST INSTRUCTIONS SBI P,b CBI P,b LSL Rd LSR Rd ROL Rd ROR Rd ASR Rd SWAP Rd BSET s BCLR s BST Rr, b BLD Rd, b SEC CLC ...
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Mnemonics Operands SPM IN Rd, P OUT P, Rr PUSH Rr POP Rd MCU CONTROL INSTRUCTIONS NOP SLEEP WDR BREAK AT90USB64/128 16 Description Store Program Memory In Port Out Port Push Register on Stack Pop Register from Stack No Operation ...
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... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...
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... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...
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... Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...
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... Lead, 14x14 mm Body Size, 1.0mm Body Thickness MD 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP Lead, 9x9 mm Body Size, 0.50mm Pitch PS Quad Flat No Lead Package (QFN) AT90USB64/128 20 (2) Ordering Code USB Interface AT90USB1287-AU Host (OTG) AT90USB1287-MU 400. (1) Package Operating Range MD Industrial PS (-40° to +85°C) ...
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TQFP64 7593KS–AVR–11/09 AT90USB64/128 21 ...
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AT90USB64/128 22 7593KS–AVR–11/09 ...
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QFN64 7593KS–AVR–11/09 AT90USB64/128 23 ...
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AT90USB64/128 24 7593KS–AVR–11/09 ...
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... Errata 8. AT90USB1287/6 Errata. AT90USB1287/6 8.1 Errata History Silicon 90USB1286-16MU Release First Release Date Code up to 0648 Date Code from 0709 to 0801 Second Release except lots 0801 7H5103* Lots 0801 7H5103* and Third Release Date Code from 0814 Note ‘*’ means a blank or any alphanumeric string 8 ...
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SUSPI bit anymore. The internal USB engine remains in suspend mode but the USB differential receiver is still enabled and generates a typical 300µA extra-power con- sumption. Detection of the suspend state after the transient perturbation should ...
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If the CPU core is in sleep and wakes-up from an asynchronous timer interrupt and then go back in sleep again it may wake up multiple times. Problem Fix/workaround ...
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... AT90USB1287/6 Second Release • Incorrect CPU behavior for VBUSTI and IDTI interrupts routines • USB Eye Diagram violation in low-speed mode • Transient perturbation in USB suspend mode generates over consumption • VBUS Session valid threshold voltage • Spike on TWI pins when TWI is enabled • ...
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Problem Fix/workaround No known workaround, enable AT90USB64/128 TWI first versus the others nodes of the TWI network. 2. High current consumption in sleep mode If a pending interrupt cannot wake the part up from the selected mode, the current consump- ...
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... AT90USB1287/6 Third Release • Incorrect CPU behavior for VBUSTI and IDTI interrupts routines • Transient perturbation in USB suspend mode generates over consumption • Spike on TWI pins when TWI is enabled • High current consumption in sleep mode • Async timer interrupt wake up from sleep generate multiple interrupts 5 ...
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A software workaround is to wait beforeperforming the sleep instruction: until TCNT2>OCR2+1. 9. AT90USB647/6 Errata. • Incorrect interrupt routine exection for VBUSTI, IDTI interrupts flags • USB Eye Diagram violation in low-speed mode • Transient perturbation in USB suspend mode ...
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If a pending interrupt cannot wake the part up from the selected mode, the current consump- tion will increase during sleep when executing the SLEEP instruction directly after a SEI instruction. Problem Fix/workaround Before entering sleep, interrupts not used to ...
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Datasheet Revision History for AT90USB64/128 Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 10.1 Changes from 7593A to 7593B 1. ...
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... Updated 2. Updated 3. Removed ATmega32U6 errata section. 10.10 Changes from 7593J to 7593K 1. Corrected 2. Corrected ordering information for 6.4 ”AT90USB1287” on page 20 andSection 6.2 ”AT90USB647” on page 3. Removed the ATmega32U6 device and updated the datasheet accordingly. 4. Updated Assembly Code Exemple in AT90USB64/128 34 Table 8-2 in “ ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...