DSPIC30F6012T-20E/PF Microchip Technology, DSPIC30F6012T-20E/PF Datasheet - Page 12

• Manufacturer Part Number: DSPIC30F6012T-20E/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012T-20E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012T20EP

dsPIC30F6011/6012/6013/6014
15. Module: DCI
FIGURE 1:
DS80456D-page 12
Note 1: The Slave mode operation shown in this figure uses the DCI module’s operation with DJST = 1, to create a work around
The Data Converter Interface (DCI) module does
not function correctly in Slave mode when the
following conditions are true:
• The DCI module is configured to transmit/receive
• The frame length chosen is longer than 1 word,
Work around
The following work around may be applied to
enable DCI communication in Slave mode when it
is configured to transmit one serial clock after the
frame synchronization pulse is received in a
multi-word frame:
1. Set the DJST bit to ‘1’.
2. Enable an additional time slot immediately
3. Enable an additional transmit/receive buffer
4. Shift the data word by 1-bit to the right and load
one serial clock (bit clock) after the frame
synchronization pulse, DJST (DCICON1<5>) = 0.
COFSG<3:0> (DCICON2<8:5>) > ‘0000’.
CSCK
COFS
Data
2: Note that the actual data intended for transmission on Time Slot 0 is now straddled across two time slots – Time Slot
3: Data loaded into TXBUF0 contains 15 MSbs of the actual 16-bit data to be transmitted, while the MSb of TXBUF0 is
4: Not all serial clock pulses are shown in this timing diagram.
following
communication.
word (modify COFSG bits) or an additional bit
per word (modify WS) for each time slot
intended for communication.
the transmit buffer word(s), such that the Least
Significant bit of the original data word to be
transmitted is loaded into the additionally
enabled bit of the Transmit Buffer register,
TXBUFn, or the Most Significant bit (MSb) of
the additionally enabled transmit buffer,
TXBUFn + 1.
for the erratum associated with the DCI module when DJST = 0.
0 and Time Slot 1. The MSb of Time Slot 0 is ‘0’; while the MSb of Time Slot 1 is actually the LSb of the data intended
for transmission.
cleared.
each
DCI SLAVE WORK AROUND
0
MSb
time
Data from TXBUF0
Time Slot 0
slot
Actual Data to be transmitted
intended
for
Frame Synch and first data bit sampled here
LSb
+ 1
EXAMPLE 11:
BCLR
MOV
RRC
RRC
MOV
MOV
MOV
RRC
RRC
MOV
MOV
LSb
This work around is now demonstrated by an
example.
Assume, the application needs the DCI module to
act as a Slave transmitting 1 serial clock after the
frame synchronization pulse is received. Further,
assume that the application needs to transmit
16-bit data word on Time Slot 0 and the
communication is over a 256*F
to reduce interrupt frequency, we enable all 4
transmit buffers. The DCI module SFRs should be
initialized as follows before being enabled:
An example of loading the DCI transmit buffers for
the configuration above is shown in Example 11. A
timing diagram in Figure 1 illustrates the various
signals for this example. A similar rule may be
applied to reading the received data from the
RXBUFn SFRs.
Affected Silicon Revisions
A3
- DCICON1 = 0x0720, DCICON2 = 0x0DEF
X
SR, #C
My1stTxDataWord, W0
W0, W0
W1, W1
W0, TXBUF0
W1, TXBUF1
My2ndTxDataWord, W0
W0, W0
W1, W1
W0, TXBUF2
W1, TXBUF3
DCICON3 = 0x0000,
TSCON = RSCON = 0x0003
Data from TXBUF1
B1
X
Time Slot 1
B2
X
DCI SLAVE WORK AROUND
© 2010 Microchip Technology Inc.
S
channel. In order