DSPIC30F6012T-20E/PF Microchip Technology, DSPIC30F6012T-20E/PF Datasheet - Page 16

• Manufacturer Part Number: DSPIC30F6012T-20E/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012T-20E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012T20EP

TABLE 5-8:
TABLE 5-9:
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A
0xF8000C
Note
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A
0xF8000C
Note
Address
Address
1:
2:
1:
On the 6011, 6012, 6013 and 6014, these bits are reserved (read as ‘1’ and must be programmed as ‘1’).
Reserved bits read as ‘1’ and must be programmed as ‘1’.
Reserved bits read as ‘1’ and must be programmed as ‘1’.
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
FICD
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
FICD
Name
Name
dsPIC30F CONFIGURATION REGISTERS (FOR dsPIC30F2010, dsPIC30F4011/4012 AND dsPIC30F6010/ 6011/6012/6013/
6014)
dsPIC30F CONFIGURATION REGISTERS (FOR dsPIC30F5011/5013)
FWDTEN
MCLREN
FWDTEN
MCLREN
BKBUG
BKBUG
Bit 15
Bit 15
FCKSM<1:0>
—
—
—
FCKSM<1:0>
—
—
—
Bit 14
Bit 14
COE
COE
—
—
—
—
—
—
—
—
—
—
Bit 13
Bit 13
—
—
—
—
—
—
—
—
—
—
Reserved
Reserved
RBS<1:0>
RSS<1:0>
Bit 12
Bit 12
(2)
(2)
—
—
—
—
—
—
—
—
—
—
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PWMPIN
Bit 10
Bit 10
—
—
—
—
—
—
—
—
—
—
—
—
(1)
Reserved
HPOL
Bit 9
Bit 9
—
—
—
—
—
—
—
—
Reserved
FOS<1:0>
FOS<1:0>
ESS<1:0>
(1)
(1)
Reserved
LPOL
Bit 8
Bit 8
(2)
EBS
—
—
—
—
—
—
(1)
(2)
BOREN
BOREN
Bit 7
Bit 7
—
—
—
—
—
—
—
—
—
—
—
—
Bit 6
Bit 6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 5
Bit 5
FWPSA<1:0>
FWPSA<1:0>
—
—
—
—
—
—
—
—
—
—
BORV<1:0>
BORV<1:0>
Bit 4
Bit 4
—
—
—
—
—
—
—
—
—
—
Bit 3
Bit 3
—
—
—
—
—
—
Reserved
BSS<2:0>
SSS<2:0>
Bit 2
Bit 2
FWPSB<3:0>
—
—
FWPSB<3:0>
—
—
Reserved
Reserved
GSS<1:0>
FPR<3:0>
FPR<3:0>
(2)
Bit 1
Bit 1
(2)
(2)
GCP
FPWRT<1:0>
FPWRT<1:0>
ICS<1:0>
ICS<1:0>
GWRP
GWRP
BWRP
SWRP
Bit 0
Bit 0