DSPIC30F6012T-20E/PF Microchip Technology, DSPIC30F6012T-20E/PF Datasheet - Page 22

• Manufacturer Part Number: DSPIC30F6012T-20E/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012T-20E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012T20EP

clocked out. The programmer can begin to clock out
the response 20 μsec after PGD is brought low, and it
must provide the necessary amount of clock pulses to
receive the entire response from the programming
executive.
Once the entire response is clocked out, the
programmer should terminate the clock on PGC until it
is time to send another command to the programming
executive. This protocol is illustrated in
7.3
In Enhanced ICSP mode, the dsPIC30F operates from
the fast internal RC oscillator, which has a nominal
frequency of 7.37 MHz. This oscillator frequency yields
an effective system clock frequency of 1.84 MHz. Since
the SPI module operates in Slave mode, the
programmer must limit the SPI clock rate to a
frequency no greater than 1 MHz.
FIGURE 7-2:
DS70102K-page 22
Note:
PGC
PGD
SPI Rate
If the programmer provides the SPI with a
clock faster than 1 MHz, the behavior of
the
unpredictable.
programming
1
MSB X X X LSB
Last Command Word
PGC = Input
PGD = Input
2
Host Transmits
PROGRAMMING EXECUTIVE – PROGRAMMER COMMUNICATION PROTOCOL
15 16
executive
P8
Figure
PGC = Input (Idle)
PGD = Output
will
7-2.
Programming Executive
Processes Command
P9a
1
be
P9b
0
7.4
The programming executive uses no Watchdog Timer
or time out for transmitting responses to the
programmer. If the programmer does not follow the flow
control mechanism using PGC, as described in
Section 7.2 “Communication Interface and Proto-
col”, it is possible that the programming executive will
behave unexpectedly while trying to send a response
to the programmer. Since the programming executive
has no time out, it is imperative that the programmer
correctly follow the described communication protocol.
As a safety measure, the programmer should use the
command time outs identified in
command time out expires, the programmer should
reset
programming the device again.
P10
the
Time Outs
1
MSB X X X LSB
2
programming
Host Clocks Out Response
15 16
PGC = Input
PGD = Output
© 2010 Microchip Technology Inc.
P11
1
executive
MSB X X X LSB
2
Table
15 16
8-1. If the
and
start