AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 128

MCU ARM 512K HS FLASH 100-LQFP

AT91SAM7X512-AU

Manufacturer Part Number
AT91SAM7X512-AU
Description
MCU ARM 512K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
No. Of I/o's
62
Ram Memory Size
128KB
Cpu Speed
55MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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20.3
20.3.1
Table 20-18. Signal Description List
128
Signal Name
VDDFLASH
VDDIO
VDDCORE
VDDPLL
GND
XIN
Serial Fast Flash Programming
AT91SAM7X512/256/128 Preliminary
Device Configuration
Function
Flash Power Supply
I/O Lines Power Supply
Core Power Supply
PLL Power Supply
Ground
Main Clock Input.
This input can be tied to GND. In this
case, the device is clocked by the internal
RC oscillator.
The Serial Fast Flash programming interface is based on IEEE Std. 1149.1 “Standard Test
Access Port and Boundary-Scan Architecture”. Refer to this standard for an explanation of terms
used in this chapter and for a description of the TAP controller states.
In this mode, data read/written from/to the embedded Flash of the device are transmitted
through the JTAG interface of the device.
In Serial Fast Flash Programming Mode, the device is in a specific test mode.Only a certain set
of pins is significant, the rest of the PIOs are used as inputs with a pull-up. The crystal oscillator
is in bypass mode. Other pins must be left unconnected.
Figure 20-4. Serial Programing
0-50MHz
VDDIO
VDDIO
VDDIO
TDO
TMS
TCK
TDI
Clocks
Power
TST
PGMEN0
PGMEN1
XIN
Ground
Power
Power
Power
Power
Type
Input
Active
Level
Comments
32 kHz to 50 MHz
VDDCORE
VDDIO
VDDPLL
VDDFLASH
GND
6120H–ATARM–17-Feb-09

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