AT91SAM7X512-AU Atmel, AT91SAM7X512-AU Datasheet - Page 139

MCU ARM 512K HS FLASH 100-LQFP

AT91SAM7X512-AU

Manufacturer Part Number
AT91SAM7X512-AU
Description
MCU ARM 512K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
No. Of I/o's
62
Ram Memory Size
128KB
Cpu Speed
55MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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21.4.3.1
21.4.3.2
6120H–ATARM–17-Feb-09
Enumeration Process
Communication Endpoints
Atmel provides an INF example to see the device as a new serial port and also provides another
custom driver used by the SAM-BA application: atm6124.sys. Refer to the document “USB Basic
Application”, literature number 6123, for more details.
The USB protocol is a master/slave protocol. This is the host that starts the enumeration send-
ing requests to the device through the control endpoint. The device handles standard requests
as defined in the USB Specification.
Table 21-2.
The device also handles some class requests defined in the CDC class.
Table 21-3.
Unhandled requests are STALLed.
There are two communication endpoints and endpoint 0 is used for the enumeration process.
Endpoint 1 is a 64-byte Bulk OUT endpoint and endpoint 2 is a 64-byte Bulk IN endpoint. SAM-
BA Boot commands are sent by the host through the endpoint 1. If required, the message is split
by the host into several data payloads by the host driver.
If the command requires a response, the host can send IN transactions to pick up the response.
Request
GET_DESCRIPTOR
SET_ADDRESS
SET_CONFIGURATION
GET_CONFIGURATION
GET_STATUS
SET_FEATURE
CLEAR_FEATURE
Request
SET_LINE_CODING
GET_LINE_CODING
SET_CONTROL_LINE_STATE
Handled Standard Requests
Handled Class Requests
AT91SAM7X512/256/128 Preliminary
Definition
Returns the current device configuration value.
Sets the device address for all future device access.
Sets the device configuration.
Returns the current device configuration value.
Returns status for the specified recipient.
Used to set or enable a specific feature.
Used to clear or disable a specific feature.
Definition
Configures DTE rate, stop bits, parity and number of
character bits.
Requests current DTE rate, stop bits, parity and number of
character bits.
RS-232 signal used to tell the DCE device the DTE device
is now present.
139

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