EP7309-CVZ Cirrus Logic Inc, EP7309-CVZ Datasheet - Page 10

• Manufacturer Part Number: EP7309-CVZ
• Description: IC ARM720T MCU 74MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP7r

Specifications of EP7309-CVZ

• Core Size: 32-Bit
• Core Processor: ARM7
• Speed: 74MHz
• Connectivity: Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
• Peripherals: LCD, LED, MaverickKey, POR, PWM
• Number Of I /o: 27
• Program Memory Type: ROMless
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 2.7 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM7)
• No. Of I/o's: 27
• Ram Memory Size: 48KB
• Cpu Speed: 74MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: SSI, UART
• Rohs Compliant: Yes
• Processor Series: EP73xx
• Core: ARM720T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1214

EP7309
High-Performance, Low-Power System on Chip
Internal Boot ROM
The internal 128 byte Boot ROM facilitates download of saved
code to the on-board SRAM/FLASH.
Packaging
The EP7309 is available in a 208-pin LQFP package, 256-ball
PBGA package or a 204-ball TFBGA package.
Pin Multiplexing
The following table shows the pin multiplexing of the DAI,
SSI2 and the CODEC. The selection between SSI2 and the
CODEC is controlled by the state of the SERSEL bit in
SYSCON2. The choice between the SSI2, CODEC, and the
DAI is controlled by the DAISEL bit in SYSCON3 (see the
EP7309 User’s Manual for more information).
10
SSICLK
SSITXDA
SSIRXDA
Mnemonic
Pin
Table 17. DAI/SSI2/CODEC Pin Multiplexing
I/O
I/O
O
I
SDOUT
SCLK
SDIN
DAI
SSIRXDA
SSITXDA
SSICLK
SSI2
©
Copyright Cirrus Logic, Inc. 2005
PCMOUT
PCMCLK
CODEC
PCMIN
(All Rights Reserved)
The following table shows the pins that have been multiplexed
in the EP7309.
SSITXFR
SSIRXFR
BUZ
RUN
nMEDCHG
PD[0]
PE[1:0]
PE[2]
Mnemonic
Signal
Pin
Table 17. DAI/SSI2/CODEC Pin Multiplexing
System
Configuration
Interrupt
Controller
GPIO
GPIO
GPIO
Table 18. Pin Multiplexing
I/O
I/O
Block
O
I
MCLKOUT
MCLKIN
LRCK
DAI
CLKEN
nBROM
LEDFLSH
BOOTSEL[1:0]
CLKSEL
Signal
SSIRXFR
SSITXFR
SSI2
System
Configuration
Boot ROM
select
LED Flasher
System
Configuration
System
Configuration
PCMSYNC
CODEC
Block
DS507F1
p/u