C8051F042-GQR Silicon Laboratories Inc, C8051F042-GQR Datasheet - Page 307

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C8051F042-GQR

Manufacturer Part Number
C8051F042-GQR
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F042-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x10b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F042-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
24.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 24.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA0 capture/com-
pare module’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to
logic 1. See Figure 24.3 for details on the PCA interrupt configuration.
PWM16 ECOM CAPP CAPN MAT
X
X
X
X
X
X
0
1
Table 24.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
X = Don’t Care
Timer Overflow
X
X
X
PCA Counter/
1
1
1
1
1
W
P
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
PCA Module 5
(for n = 0 to 5)
PCA0CPMn
C
O
M
E
n
C
A
P
P
n
CCF0
CCF1
CCF2
CCF3
CCF4
CCF5
C
A
P
N
n
M
A
T
n
1
0
1
0
0
0
0
0
O
G
T
n
W
M
P
n
E
C
C
F
n
C
Figure 24.3. PCA Interrupt Block Diagram
F
C
R
PCA0CN
C
C
F
5
0
1
1
0
0
0
0
0
C
C
F
4
C
C
F
3
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
ECCF5
0
0
0
1
1
0
0
0
C
D
L
I
PCA0MD
C
P
S
2
C
TOG PWM ECCF
P
S
1
0
1
0
1
0
1
0
1
0
1
0
1
C
P
S
0
0
0
0
0
1
1
0
0
E
C
F
0
1
Rev. 1.5
0
0
0
0
0
1
1
1
C8051F040/1/2/3/4/5/6/7
X
X
X
X
X
X
0
0
Capture triggered by transition on CEXn
Capture triggered by negative edge on
Capture triggered by positive edge on
16-Bit Pulse Width Modulator
8-Bit Pulse Width Modulator
(EIE1.3)
EPCA0
High-Speed Output
Frequency Output
Operation Mode
Software Timer
0
1
CEXn
CEXn
(IE.7)
EA
0
1
Interrupt
Priority
Decoder
305

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