UPD78F9211GR-JJG-A Renesas Electronics America, UPD78F9211GR-JJG-A Datasheet - Page 127

• Manufacturer Part Number: UPD78F9211GR-JJG-A
• Description: MCU 8BIT 2KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9211GR-JJG-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

(4) Capture register data retention
(5) Setting of 16-bit timer mode control register 00 (TMC00)
(6) Setting of capture/compare control register 00 (CRC00)
(7) Setting of 16-bit timer output control register 00 (TOC00)
(8) Setting of prescaler mode register 00 (PRM00)
(9) Valid edge setting
(10) One-shot pulse output
(11) One-shot pulse output by software
The values of 16-bit timer capture/compare registers 0n0 (CR0n0) after 16-bit timer/event counter 00 has
stopped are not guaranteed.
Remark n = 0, 1
The timer operation must be stopped before writing to bits other than the OVF00 flag.
The timer operation must be stopped before setting CRC00.
<1> Timer operation must be stopped before setting other than OSPT00.
<2> If LVS00 and LVR00 are read, 0 is read.
<3> OSPT00 is automatically cleared after data is set, so 0 is read.
<4> Do not set OSPT00 to 1 other than in one-shot pulse output mode.
<5> A write interval of two cycles or more of the count clock selected by prescaler mode register 00 (PRM00)
Always set data to PRM00 after stopping the timer operation.
Set the valid edge of the TI000 pin with bits 4 and 5 (ES000 and ES010) of prescaler mode register 00
(PRM00) after stopping the timer operation.
One-shot pulse output normally operates only in the free-running mode or in the clear & start mode at the valid
edge of the TI000 pin. Because an overflow does not occur in the clear & start mode on a match between
TM00 and CR000, one-shot pulse output is not possible.
<1> Do not set the OSPT00 bit to 1 again while the one-shot pulse is being output. To output the one-shot
<2> When using the one-shot pulse output of 16-bit timer/event counter 00 with a software trigger, do not
is required, when OSPT00 is set to 1 successively.
pulse again, wait until the current one-shot pulse output is completed.
change the level of the TI000 pin or its alternate function port pin.
Because the external trigger is valid even in this case, the timer is cleared and started even at the level
of the TI000 pin or its alternate function port pin, resulting in the output of a pulse at an undesired timing.
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U16994EJ6V0UD
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