AT90LS2323-4SI Atmel, AT90LS2323-4SI Datasheet
AT90LS2323-4SI
Specifications of AT90LS2323-4SI
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AT90LS2323-4SI Summary of contents
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... Five Programmable I/O Lines for AT90S/LS2343 – 8-pin PDIP and SOIC • Operating Voltages – 4.0 - 6.0V for AT90S2323/AT90S2343 – 2.7 - 6.0V for AT90LS2323/AT90LS2343 • Speed Grades – MHz for AT90S2323/AT90S2343-10 – MHz for AT90LS2323/AT90LS2343-4 – MHz for AT90LS2343-1 Pin Configuration RESET 1 8 VCC (CLOCK) PB3 2 ...
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Description Block Diagram AT90S/LS2323/2343 2 The AT90S/LS2323 and AT90S/LS2343 are low-power, CMOS, 8-bit microcontrollers based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S2323/2343 achieves throughputs approaching 1 MIPS per MHz allowing the ...
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... Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-chip Flash allows the program memory to be reprogrammed in-system through an SPI serial interface ...
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... XTAL1 XTAL2 AT90S/LS2323/2343 4 chip, the Atmel AT90S2323/2343 is a powerful microcontroller that provides a highly flexible and cost-effective solution to many embedded control applications. The AT90S2323/2343 AVR is supported with a full suite of program and system devel- opment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators and evaluation kits. ...
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Pin Descriptions AT90S/LS2343 VCC GND Port B (PB4..PB0) RESET CLOCK Clock Options Crystal Oscillator External Clock 1004D–09/01 Supply voltage pin. Ground pin. Port 5-bit bi-directional I/O port with internal pull-up resistors. The Port B output buffers can ...
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AT90S/LS2323/2343 6 Figure 4. External Clock Drive Configuration AT90S/LS2343 EXTERNAL PB3 OSCILATOR SIGNAL GND AT90S/LS2323 XTAL2 NC EXTERNAL OSCILATOR XTAL1 SIGNAL GND 1004D–09/01 ...
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Architectural Overview 1004D–09/01 The fast-access register file concept contains 32 x 8-bit general-purpose working regis- ters with a single clock cycle access time. This means that during one single clock cycle, one ALU (Arithmetic Logic Unit) operation is executed. Two ...
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AT90S/LS2323/2343 8 The AVR has Harvard architecture – with separate memories and buses for program and data. The program memory is accessed with a two-stage pipeline. While one instruction is being executed, the next instruction is pre-fetched from the program ...
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General-purpose Register File 1004D–09/01 Figure 7 shows the structure of the 32 general-purpose registers in the CPU. Figure 7. AVR CPU General-purpose Working Registers 7 General Purpose Working Registers All the register operating instructions in the instruction set have direct ...
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X-register, Y-register and Z- register ALU – Arithmetic Logic Unit In-System Programmable Flash Program Memory EEPROM Data Memory AT90S/LS2323/2343 10 The registers R26..R31 have some added functions to their general-purpose usage. These registers are the address pointers for indirect addressing ...
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SRAM Data Memory 1004D–09/01 Figure 9 shows how the AT90S2323/2343 Data Memory is organized. Figure 9. SRAM Organization Register File … R29 R30 R31 I/O Registers $00 $01 $02 … $3D $3E $3F The 224 data memory ...
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Program and Data Addressing Modes Register Direct, Single Register Rd Register Direct, Two Registers Rd and Rr AT90S/LS2323/2343 12 The AT90S2323/2343 AVR RISC microcontroller supports powerful and efficient addressing modes for access to the program memory (Flash) and data memory. ...
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I/O Direct Data Direct Data Indirect with Displacement 1004D–09/01 Figure 12. I/O Direct Addressing Operand address is contained in six bits of the instruction word the destination or source register address. Figure 13. Direct Data Addressing A 16-bit ...
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Data Indirect Data Indirect with Pre- decrement Data Indirect with Post- increment AT90S/LS2323/2343 14 Figure 15. Data Indirect Addressing Operand address is the contents of the X-, Y-, or the Z-register. Figure 16. Data Indirect Addressing with Pre-decrement The X-, ...
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Constant Addressing Using the LPM Instruction Indirect Program Addressing, IJMP and ICALL Relative Program Addressing, RJMP and RCALL 1004D–09/01 Figure 18. Code Memory Constant Addressing Constant byte address is specified by the Z-register contents. The 15 MSBs select word address ...
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Memory Access and Instruction Execution Timing AT90S/LS2323/2343 16 This section describes the general access timing concepts for instruction execution and internal memory access. The AVR CPU is driven by the System Clock Ø, directly generated from the external clock signal ...
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I/O Memory 1004D–09/01 Figure 23. On-chip Data SRAM Access Cycles T1 System Clock Ø Address Prev. Address Data WR Data RD The I/O space definition of the AT90S2323/2343 is shown in Table 2. Table 2. AT90S2323/2343 I/O Space Address Hex ...
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Status Register – SREG AT90S/LS2323/2343 18 and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O registers as SRAM, $20 must be added to these addresses. All I/O register addresses throughout this document are shown with ...
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Stack Pointer – SPL Reset and Interrupt Handling 1004D–09/01 • Bit 0 – C: Carry Flag The carry flag C indicates a carry in an arithmetical or logical operation. See the Instruc- tion Set description for detailed information. Note that ...
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Reset Sources AT90S/LS2323/2343 20 The most typical program setup for the Reset and Interrupt vector addresses are: Address Labels Code $000 rjmp RESET $001 rjmp EXT_INT0 $002 rjmp TIM_OVF0 $003 MAIN: ldi r16, low(RAMEND) out SPL, r16 <instr> xxx ... ...
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Power-on Reset 1004D–09/01 Table 4. Reset Characteristics (V Symbol Parameter Power-on Reset Threshold Voltage, rising (1) V POT Power-on Reset Threshold Voltage, falling V RESET Pin Threshold Voltage RST Reset Delay Time-out Period AT90S/LS2323 t TOUT FSTRT Programmed Reset Delay ...
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External Reset AT90S/LS2323/2343 22 Figure 25. MCU Start-up, RESET Tied POT VCC V RST RESET t TOUT TIME-OUT INTERNAL RESET Figure 26. MCU Start-up, RESET Controlled Externally V POT VCC RESET TIME-OUT INTERNAL RESET An external reset ...
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Watchdog Reset MCU Status Register – MCUSR 1004D–09/01 When the Watchdog times out, it will generate a short reset pulse of 1 CPU clock cycle duration. On the falling edge of this pulse, the delay timer starts counting the Time-out ...
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Interrupt Handling General Interrupt Mask Register – GIMSK AT90S/LS2323/2343 24 Table 8. Reset Source Identification PORF EXTRF The AT90S2323/2343 has two 8-bit interrupt mask control registers; GIMSK (General Interrupt Mask register) and ...
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General Interrupt Flag Register – GIFR Timer/Counter Interrupt Mask Register – TIMSK Timer/Counter Interrupt FLAG Register – TIFR 1004D–09/01 Bit $3A ($5A) – INTF0 – Read/Write R R/W R Initial Value • Bit 7 ...
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External Interrupt Interrupt Response Time MCU Control Register – MCUCR AT90S/LS2323/2343 26 • Bit 0 – Res: Reserved Bit This bit is a reserved bit in the AT90S2323/2343 and always reads zero. The external interrupt is triggered by the INT0 ...
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Sleep Modes Idle Mode Power-down Mode 1004D–09/01 activate the interrupt are defined in Table 9. The value on the INT01 pin is sampled before detecting edges. If edge or toggle interrupt is selected, pulses that last longer than one clock ...
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Timer/Counter Timer/Counter Prescaler 8-bit Timer/Counter0 AT90S/LS2323/2343 28 The AT90S2323/2343 provides one general-purpose 8-bit Timer/Counter – Timer/Counter0. The Timer/Counter has prescaling selection from the 10-bit prescaling timer. The Timer/Counter can be used either as a timer with an internal clock time ...
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Timer/Counter0 Control Register – TCCR0 1004D–09/01 Figure 30. Timer/Counter 0 Block Diagram Bit $33 ($53) – – – Read/Write Initial Value • Bits 7..3 – Res: Reserved Bits These bits are ...
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Timer/Counter0 – TCNT0 Watchdog Timer AT90S/LS2323/2343 30 The Stop condition provides a Timer Enable/Disable function. The CK down divided modes are scaled directly from the CK oscillator clock. If the external pin modes are used for Timer/Counter0, transitions on PB2/(T0) ...
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Watchdog Timer Control Register – WDTCR 1004D–09/01 Bit $21 ($41) – – – Read/Write Initial Value • Bits 7..5 – Res: Reserved Bits These bits are reserved bits in the AT90S2323/2343 ...
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EEPROM Read/Write Access EEPROM Address Register – EEAR EEPROM Data Register – EEDR AT90S/LS2323/2343 32 The EEPROM access registers are accessible in the I/O space. The write access time is in the range of 2 ms, depending on ...
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EEPROM Control Register – EECR 1004D–09/01 Bit $1C ($3C) – – – Read/Write Initial Value • Bits 7..3 – Res: Reserved Bits These bits are reserved bits in the AT90S2323/2343 and ...
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Prevent EEPROM Corruption AT90S/LS2323/2343 34 During periods of low V , the EEPROM data can be corrupted because the supply volt- CC age is too low for the CPU and the EEPROM to operate properly. These issues are the same ...
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I/O Port B Port B Data Register – PORTB Port B Data Direction Register – DDRB 1004D–09/01 All AVR ports have true read-modify-write functionality when used as general digital I/O ports. This means that the direction of one port pin ...
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Port B Input Pins Address – PINB Port B as General Digital I/O Alternate Functions of Port B AT90S/LS2323/2343 36 Bit $16 ($36) – – – Read/Write Initial Value The Port ...
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... RCEN Fuse does not take effect until the next Power-on Reset. AT90S/LS2323 cannot select the internal RC oscillator as the MCU source. The status of the Fuse bits is not affected by Chip Erase. All Atmel microcontrollers have a three-byte signature code that identifies the device. The three bytes reside in a separate address space. (Note:) ...
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... Low-voltage Serial Programming AT90S2323 4.0 - 6.0V AT90LS2323 2.7 - 6.0V AT90S2323 4.0 - 6.0V AT90LS2323 2.7 - 6.0V This section describes how to program and verify Flash program memory, EEPROM data memory, Lock bits and Fuse bits in the AT90S2323/2343. Figure 32. High-voltage Serial Programming 11.5 - 12.5V RESET ...
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High-voltage Serial Programming Algorithm 1004D–09/01 To program and verify the AT90S/LS2323 and AT90S/LS234 in the high-voltage Serial Programming mode, the following sequence is recommended (see instruction formats in Table 16): 1. Power-up sequence: Apply 4.5 - 5.5V between V PB0 ...
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Table 16. High-voltage Serial Programming Instruction Set Instruction Instr.1 PB0 0_1000_0000_00 Chip Erase PB1 0_0100_1100_00 PB2 x_xxxx_xxxx_xx PB0 0_0001_0000_00 Write Flash High and Low PB1 0_0100_1100_00 Address PB2 x_xxxx_xxxx_xx PB0 i_i _00 Write ...
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Table 16. High-voltage Serial Programming Instruction Set (Continued) Instruction Instr.1 Read Fuse PB0 0_0000_0100_00 and Lock Bits PB1 0_0100_1100_00 (AT90S/ PB2 x_xxxx_xxxx_xx LS2323) Read Fuse PB0 0_0000_0100_00 and Lock Bits PB1 0_0100_1100_00 (AT90S/ PB2 x_xxxx_xxxx_xx LS2343) PB0 0_0000_1000_00 Read PB1 ...
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High-voltage Serial Programming Characteristics Low-voltage Serial Downloading AT90S/LS2323/2343 42 Figure 34. High-voltage Serial Programming Timing SDI (PB0), SII (PB1) t SCI (XTAL1/PB3) SDO (PB2) Table 17. High-voltage Serial Programming Characteristics, T 5.0V ± 10% (unless otherwise noted) Symbol Parameter t ...
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Low-voltage Serial Programming Algorithm 1004D–09/01 For the EEPROM, an auto-erase cycle is provided within the self-timed Write instruction and there is no need to first execute the Chip Erase instruction. The Chip Erase instruc- tion turns the content of every ...
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Data Polling EEPROM Data Polling Flash AT90S/LS2323/2343 the end of the programming session, RESET can be set high to commence normal operation. 8. Power-off sequence (if needed): Set CLOCK/XTAL1 to “0”. Set RESET to “1”. Turn V ...
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Table 19. Low-voltage Serial Programming Instruction Set AT90S2323/2343 Instruction Byte 1 Programming 1010 1100 Enable 1010 1100 Chip Erase 0010 H000 Read Program Memory 0100 H000 Write Program Memory Read 1010 0000 EEPROM Memory Write 1100 0000 EEPROM Memory Read ...
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Low-voltage Serial Programming Characteristics AT90S/LS2323/2343 46 Figure 37. Low-voltage Serial Programming Timing MOSI t OVSH SCK MISO Table 20. Low-voltage Serial Programming Characteristics, T 2.7 - 6.0V (unless otherwise noted) Symbol Parameter 1/t Oscillator Frequency (V CLCL CC t Oscillator ...
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Electrical Characteristics Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin except RESET with respect to Ground ..............................-1. Voltage on RESET with Respect to Ground ....-1.0V to +13.0V Maximum ...
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External Clock Drive Waveforms AT90S/LS2323/2343 48 Figure 38. Waveforms VIH1 VIL1 External Clock Drive = -40 ° ° Symbol Parameter 1/t Oscillator Frequency CLCL t Clock Period CLCL t High Time CHCX t Low ...
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Typical Characteristics 1004D–09/01 The following charts show typical behavior. These figures are not tested during manu- facturing. All current consumption measurements are performed with all I/O pins configured as inputs and with internal pull-ups enabled. A sine wave generator with ...
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AT90S/LS2323/2343 50 Figure 40. Active Supply Current vs. V ACTIVE SUPPLY CURRENT vs 2.5 3 3.5 Figure 41. Active Supply Current vs. V ACTIVE SUPPLY CURRENT vs. ...
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Figure 42. Idle Supply Current vs. Frequency IDLE SUPPLY CURRENT vs. FREQUENCY 5 4.5 4 3.5 3 2.5 2 1 Figure 43. Idle Supply Current vs. V IDLE SUPPLY CURRENT ...
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AT90S/LS2323/2343 52 Figure 44. Idle Supply Current vs. V IDLE SUPPLY CURRENT vs. V DEVICE CLOCKED BY INTERNAL RC OSCILLATOR 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 2.5 3 3.5 Figure 45. Power-down Supply Current vs. V ...
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Figure 46. Power-down Supply Current vs. V POWER DOWN SUPPLY CURRENT vs. V WATCHDOG TIMER ENABLED 180 160 140 120 100 2.5 3 Figure 47. Watchdog Oscillator Frequency vs. V WATCHDOG OSCILLATOR FREQUENCY ...
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AT90S/LS2323/2343 54 Note: Sink and source capabilities of I/O ports are measured on one pin at a time. Figure 48. Pull-up Resistor Current vs. Input Voltage PULL-UP RESISTOR CURRENT vs. INPUT VOLTAGE 120 ˚ A 100 ...
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Figure 50. I/O Pin Sink Current vs. Output Voltage I/O PIN SINK CURRENT vs. OUTPUT VOLTAGE 0.5 1 Figure 51. I/O PIn Source Current vs. Output Voltage I/O PIN SOURCE ...
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AT90S/LS2323/2343 56 Figure 52. I/O Pin Sink Current vs. Output Voltage I/O PIN SINK CURRENT vs. OUTPUT VOLTAGE 0.5 Figure 53. I/O Pin Source Current vs. Output voltage I/O PIN SOURCE CURRENT vs. ...
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Figure 54. I/O Pin Input Threshold Voltage vs. V I/O PIN INPUT THRESHOLD VOLTAGE vs. V 2.5 2 1.5 1 0.5 0 2.7 Figure 55. I/O Pin Input Hysteresis vs. V I/O PIN INPUT HYSTERESIS vs. V 0.18 0.16 ...
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AT90S2323/2343 Register Summary Address Name Bit 7 $3F ($5F) SREG I $3E ($5E) Reserved $3D ($5D) SPL SP7 $3C ($5C) Reserved $3B ($5B) GIMSK - $3A ($5A) GIFR - $39 ($59) TIMSK - $38 ($58) TIFR - $37 ($57) Reserved ...
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Instruction Set Summary Mnemonic Operands Description ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add Two Registers ADC Rd, Rr Add with Carry Two Registers ADIW Rdl, K Add Immediate to Word SUB Rd, Rr Subtract Two Registers SUBI Rd, K ...
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Instruction Set Summary (Continued) Mnemonic Operands Description DATA TRANSFER INSTRUCTIONS MOV Rd, Rr Move between Registers LDI Rd, K Load Immediate LD Rd, X Load Indirect LD Rd, X+ Load Indirect and Post-inc. LD Rd, -X Load Indirect and Pre-dec. ...
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... The fuse settings can be changed by high voltage serial programming. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 1004D–09/01 Ordering Code 4 AT90LS2323-4PC AT90LS2323-4SC AT90LS2323-4PI AT90LS2323-4SI AT90S2323-10PC AT90S2323-10SC AT90S2323-10PI AT90S2323-10SI 1 AT90LS2343-1PC AT90LS2343-1SC AT90LS2343-1PI AT90LS2343-1SI 4 ...
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Packaging Information 8P3 8P3, 8-lead, Plastic Dual Inline Package (PDIP), 0.300" Wide. Dimensions in Millimeters and (Inches)* JEDEC STANDARD MS-001 BA .300 (7.62) REF 5.33(0.210) MAX Seating Plane 3.81(0.150) 2.92(0.115) 0.356(0.014) 0.203(0.008) REV. A 04/11/2001 AT90S/LS2323/2343 62 10.16(0.400) 9.017(0.355) PIN ...
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PIN 1 0 REF 8 1004D–09/01 .020 (.508) .012 (.305) .213 (5.41) .205 (5.21) .050 (1.27) BSC .212 (5.38) .203 (5.16) .013 (.330) .004 (.102) .010 (.254) .007 (.178) .035 (.889) .020 (.508) AT90S/LS2323/2343 .330 (8.38) .300 (7.62) .080 ...
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