AT90S8515-8JC Atmel, AT90S8515-8JC Datasheet - Page 25

• Manufacturer Part Number: AT90S8515-8JC
• Description: IC MCU 8K FLSH 8MHZ 44PLCC
• Manufacturer: Atmel
• Series: AVR® 90Sr

Specifications of AT90S8515-8JC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

External Reset
Watchdog Reset
Interrupt Handling
0841G–09/01
An external reset is generated by a low level on the RESET pin. Reset pulses longer
than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not
guaranteed to generate a reset. When the applied signal reaches the Reset Threshold
Voltage (V
period t
Figure 26. External Reset during Operation
When the Watchdog times out, it will generate a short reset pulse of 1 XTAL cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
t
Figure 27. Watchdog Reset during Operation
The AT90S8515 has two 8-bit interrupt mask control registers; GIMSK (General Inter-
rupt Mask register) and TIMSK (Timer/Counter Interrupt Mask register).
When an interrupt occurs, the Global Interrupt Enable I-bit is cleared (zero) and all inter-
rupts are disabled. The user software can set (one) the I-bit to enable nested interrupts.
The I-bit is set (one) when a Return from Interrupt instruction (RETI) is executed.
For interrupts triggered by events that can remain static (e.g., the Output Compare
Register1 matching the value of Timer/Counter1), the interrupt flag is set when the event
occurs. If the interrupt flag is cleared and the interrupt condition persists, the flag will not
be set until the event occurs the next time.
When the Program Counter is vectored to the actual interrupt vector in order to execute
the interrupt handling routine, hardware clears the corresponding flag that generated the
TOUT
. Refer to page 42 for details on operation of the Watchdog.
TOUT
RST
has expired.
) on its positive edge, the delay timer starts the MCU after the Time-out
AT90S8515
25