ATMEGA323-8AC Atmel, ATMEGA323-8AC Datasheet - Page 105

• Manufacturer Part Number: ATMEGA323-8AC
• Description: IC AVR MCU 32K 8MHZ COM 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA3238AC

ATmega323(L)
By setting the TWEA bit low, the device can be virtually disconnected from the Two-wire
Serial Bus temporarily. Address recognition can then be resumed by setting the TWEA
bit again.
• Bit 5 – TWSTA: Two-wire Serial Bus START Condition Flag
The TWSTA Flag is set by the application when it desires to become a Master on the
Two-wire Serial Bus. The Two-wire Serial Interface hardware checks if the bus is avail-
able, and generates a START condition on the bus if it is free. However, if the bus is not
free, the Two-wire Serial Interface waits until a STOP condition is detected, and then
generates a new START condition to claim the bus Master status.
• Bit 4 – TWSTO: Two-wire Serial Bus STOP Condition Flag
TWSTO is a Stop Condition Flag. In Master mode setting the TWSTO bit in the Control
Register will generate a STOP condition on the Two-wire Serial Bus. When the STOP
condition is executed on the bus, the TWSTO bit is cleared automatically. In Slave mode
setting the TWSTO bit can be used to recover from an error condition. No stop condition
is generated on the bus then, but the Two-wire Serial Interface returns to a well-defined
unaddressed Slave mode and releases the SCL and SDA lines to a high impedance
state.
• Bit 3 – TWWC: Two-wire Serial Bus Write Collision Flag
The TWWC bit is set when attempting to write to the Two-wire Serial Interface Data
Register – TWDR when TWINT is low. This flag is cleared by writing the TWDR Register
when TWINT is high.
• Bit 2 – TWEN: Two-wire Serial Interface Enable Bit
The TWEN bit enables Two-wire Serial Interface operation. If this bit is cleared (zero),
the bus outputs SDA and SCL are set to high impedance state, and the input signals are
ignored. The interface is activated by setting this bit (one).
• Bit 1 – Res: Reserved Bit
This bit is a reserved bit in the ATmega323 and will always read as zero.
• Bit 0 – TWIE: Two-wire Serial Interface Interrupt Enable
When this bit is enabled, and the I-bit in SREG is set, the Two-wire Serial Interface inter-
rupt will be activated for as long as the TWINT Flag is high.
The TWCR is used to control the operation of the Two-wire Serial Interface. It is used to
enable the Two-wire Serial Interface, to initiate a Master access by applying a START
condition to the bus, to generate a Receiver acknowledge, to generate a stop condition,
and to control halting of the bus while the data to be written to the bus are written to the
TWDR. It also indicates a write collision if data is attempted written to TWDR while the
register is inaccessible.
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