ATMEGA323-8AI Atmel, ATMEGA323-8AI Datasheet - Page 186

• Manufacturer Part Number: ATMEGA323-8AI
• Description: IC AVR MCU 32K 8MHZ IND 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA3238AI

Program and Data
Memory Lock Bits
186
ATmega323(L)
The ATmega323 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in Table 63. The Lock bits can
only be erased to “1” with the Chip Erase command.
Table 63. Lock Bit Protection Modes
BLB0 mode
BLB1 mode
LB mode
Do_spm:
Wait_ee:
Wait_spm:
; input: spmcrval determines SPM action
; check that no EEPROM write access is running
; SPM timed sequence
; check for SPM complete
1
2
3
1
2
3
4
Memory Lock Bits
call Do_spm
rjmp Return
sbic EECR, EEWE
rjmp Wait_ee
out
spm
.dw $FFFF
nop
in
sbrc temp1, SPMEN
rjmp Wait_spm
ret
BLB02
BLB12
SPMCR, spmcrval
temp1, SPMCR
LB2
1
1
0
1
1
0
0
BLB01
BLB11
LB1
1
0
0
1
0
0
1
Protection Type
No memory lock features enabled for parallel, serial, and
JTAG programming.
Further programming of the Flash and EEPROM is
disabled in parallel, serial, and JTAG programming mode.
The Fuse bits are locked in both serial and parallel
programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in parallel, serial, and JTAG
programming mode. The Fuse bits are locked in both
serial and parallel programming mode.
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
; ensure proper pipelining
; of next instruction
(1)
(1)
1457G–AVR–09/03