PIC16C433T-I/SO Microchip Technology, PIC16C433T-I/SO Datasheet - Page 35

IC MCU CMOS 8BIT 10MHZ 2K 18SOIC

PIC16C433T-I/SO

Manufacturer Part Number
PIC16C433T-I/SO
Description
IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C433T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
AC164030 - MODULE SKT PROMATEII 28DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
6.0
The PIC16C433 has an integrated LIN bus transceiver,
which allows the microcontroller to communicate via a
LIN bus. The LIN bus protocol is handled by the micro-
controller. The conversion from 5V signal to LIN bus
signals is handled by the transceiver
6.1
The LIN bus protocol is not described within this docu-
ment. For further information regarding the LIN bus
protocol, please refer to www.lin-subbus.org.
6.2
The LIN protocol is implemented and programmed by
the user, using the LINTX and LINRX bits, which are
used to interface to the transceiver. The LIN Bus firm-
ware transmits by toggling the LINTX bit in the GPIO
register and is read by reading the LINRX bit in the
GPIO register. All aspects of the protocol are handled
by software (i.e. bit-banged), where the transceiver is
used as the physical interface to the LIN Bus network.
For LIN Bus slave implementation software, please
refer to Microchip's web site (www.microchip.com).
The transceiver in the PIC16C433 uses the microcon-
troller's dual-die interface; therefore, the software must
initialize the LINTX and LINRX bits to a '1' before each
FIGURE 6-1:
 2002 Microchip Technology Inc.
Data bus
LIN Bus TRANSCEIVER
The LIN Bus Protocol
LIN Bus Interfacing
BLOCK DIAGRAM OF LINRX (SDA LINE)
Read
GPIO
Write
GPIO
Output Latch
Input Latch
D
Q
ck
RESET
EN
EN
ck
D
Q
ltchpin
Preliminary
Schmitt Trigger
LIN communication. If the LINTX bit is left cleared (e.g.,
CLRF GPIO), no other nodes on the network will be
able to communicate on the LIN Bus until LINTX is set
to '1' for '0' is the dominate state for the protocol.
EXAMPLE 6-1:
It is recommended that the firmware verify each bit
transmitted, by comparing the LINTX and LINRX bits,
to ensure no bus contention or hardware failure has
occurred. The LINTX and LINRX bits have no associ-
ated TRIS bits. Therefore, LINTX is always an output
and LINRX is always an input.
6.3
Figure 6-3 shows how to implement the hardware LIN
Bus interface in a master configuration and Figure 6-4
in a slave configuration using the PIC16C433.
Figure 6-5 shows how to implement the hardware for a
master configuration using BACT pin to generate a
wake-up interrupt using GP2. The transceiver has an
internal series resistor and diode, as defined in the LIN
1.2 specification, connecting V
MOVLW
MOVWF
LIN Bus Hardware Interface
H'C0'
GPIO
V
DD
Initializing LINTX and
LINRX Bits
PIC16C433
BAT
and LIN pin.
to LIN Transceiver
DS41139B-page 33

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