ATMEGA162-16MC Atmel, ATMEGA162-16MC Datasheet - Page 115

• Manufacturer Part Number: ATMEGA162-16MC
• Description: IC MCU AVR 16K 5V 16MHZ 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-VQFN Exposed Pad
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Compare Match Output
Unit
2513C–AVR–09/02
The Compare Output mode (COMnx1:0) bits have two functions. The waveform genera-
tor uses the COMnx1:0 bits for defining the output compare (OCnx) state at the next
compare match. Secondly the COMnx1:0 bits control the OCnx pin output source. Fig-
ure 50 shows a simplified schematic of the logic affected by the COMnx1:0 bit setting.
The I/O Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of
the general I/O port control registers (DDR and PORT) that are affected by the
COMnx1:0 bits are shown. When referring to the OCnx state, the reference is for the
internal OCnx Register, not the OCnx pin. If a System Reset occur, the OCnx Register is
reset to “0”.
Figure 50. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the output compare (OCnx) from the
Waveform Generator if either of the COMnx1:0 bits are set. However, the OCnx pin
direction (input or output) is still controlled by the Data Direction Register (DDR) for the
port pin. The Data Direction Register bit for the OCnx pin (DDR_OCnx) must be set as
output before the OCnx value is visible on the pin. The port override function is generally
independent of the Waveform Generation mode, but there are some exceptions. Refer
to Table 53, Table 54 and Table 55 for details.
The design of the output compare pin logic allows initialization of the OCnx state before
the output is enabled. Note that some COMnx1:0 bit settings are reserved for certain
modes of operation. See “16-bit Timer/Counter Register Description” on page 126.
The COMnx1:0 bits have no effect on the input capture unit.
COMnx1
COMnx0
FOCnx
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCnx
ATmega162(V/U/L)
Q
Q
Q
1
0
OCnx
Pin
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