ATMEGA162L-8PC Atmel, ATMEGA162L-8PC Datasheet - Page 208

• Manufacturer Part Number: ATMEGA162L-8PC
• Description: IC MCU AVR 16K 3V 8MHZ 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162L-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Scanning the Clock Pins
208
ATmega162(V/U/L)
The AVR devices have many clock options selectable by fuses. These are: Internal RC
Oscillator, External Clock, (High Frequency) Crystal Oscillator, Low Frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 90 shows how each Oscillator with external connection is supported in the scan
chain. The Enable signal is supported with a general Boundary-scan cell, while the
Oscillator/clock output is attached to an observe-only cell. In addition to the main clock,
the Timer Oscillator is scanned in the same way. The output from the internal RC Oscil-
lator is not scanned, as this Oscillator does not have external connections.
Figure 90. Boundary-scan Cells for Oscillators and Clock Options
Table 86 summaries the scan registers for the external clock pin XTAL1, oscillators with
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 86. Scan Signals for the Oscillator
Notes:
Enable Signal
EXTCLKEN
OSCON
OSC32EN
TOSKON
From Digital Logic
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time,
between the Internal Oscillator oscillatorand the JTAG TCK clock. If possible, scan-
ning an external clock is preferred.
the clock configuration is considered fixed for a given application. The user is advised
to scan the same clock option as to be used in the final system. The enable signals
are supported in the scan chain because the system logic can disable clock options
in sleep modes, thereby disconnecting the Oscillator pins from the scan path if not
provided. The INTCAP selection is not supported in the scan-chain, so the boundary
scan chain can not make a XTAL Oscillator requiring internal capacitors to run unless
the fuses are correctly programmed.
Previous
From
Cell
ShiftDR
0
1
ClockDR
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
OSC32CK
TOSCK
D
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
Clock Option
External Clock
External Crystal
External Ceramic Resonator
Low Freq. External Crystal
32 kHz Timer Oscillator
XTAL1/TOSC1
(1)(2)(3)
ENABLE
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
0
1
ClockDR
Scanned Clock
Line when Not
D
FF1
Q
Next
2513C–AVR–09/02
Cell
To
Used
0
0
0
0
To System Logic