ATMEGA162V-1MC Atmel, ATMEGA162V-1MC Datasheet - Page 135

IC MCU AVR 16K 1.8V 8MHZ 44-QFN

ATMEGA162V-1MC

Manufacturer Part Number
ATMEGA162V-1MC
Description
IC MCU AVR 16K 1.8V 8MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162V-1MC

Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Extended Timer/Counter
Interrupt Flag Register –
ETIFR
2513C–AVR–09/02
(1)
Note:
• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture
Register (ICR3) is set by the WGMn3:0 to be used as the TOP value, the ICF3 flag is set
when the counter reaches the TOP value.
ICF3 is automatically cleared when the Input Capture Interrupt Vector is executed. Alter-
natively, ICF3 can be cleared by writing a logic one to its bit location.
• Bit 4 – OCF3A: Timer/Counter3, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register A (OCR3A).
Note that a Forced Output Compare (FOC3A) strobe will not set the OCF3A flag.
OCF3A is automatically cleared when the Output Compare Match A Interrupt Vector is
executed. Alternatively, OCF3A can be cleared by writing a logic one to its bit location.
• Bit 3 – OCF3B: Timer/Counter3, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register B (OCR3B).
Note that a Forced Output Compare (FOC3B) strobe will not set the OCF3B flag.
OCF3B is automatically cleared when the Output Compare Match B Interrupt Vector is
executed. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 2 – TOV3: Timer/Counter3, Overflow Flag
The setting of this flag is dependent of the WGMn3:0 bits setting. In normal and CTC
modes, the TOV3 flag is set when the timer overflows. Refer to Table 56 on page 128
for the TOV3 flag behavior when using another WGMn3:0 bit setting.
TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt Vector is
executed. Alternatively, TOV3 can be cleared by writing a logic one to its bit location.
Bit
Read/Write
Initial Value
1. This register contains flag bits for several Timer/Counters, but only Timer3 bits are
described in this section. The remaining bits are described in their respective Timer
sections.
R
7
0
R
6
0
ICF3
R/W
5
0
OCF3A
R/W
4
0
OC3FB
R/W
3
0
ATmega162(V/U/L)
TOV3
R/W
2
0
R
1
0
R
0
0
ETIFR
135

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