PIC18LF2539T-I/SO Microchip Technology, PIC18LF2539T-I/SO Datasheet - Page 214

IC MCU FLASH 12KX16 EE AD 28SOIC

PIC18LF2539T-I/SO

Manufacturer Part Number
PIC18LF2539T-I/SO
Description
IC MCU FLASH 12KX16 EE AD 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2539T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX39
TABLE 21-1:
DS30485A-page 212
a
bbb
BSR
d
dest
f
fs
fd
k
label
mm
*
*+
*-
+*
n
PRODH
PRODL
s
u
WREG
x
TBLPTR
TABLAT
TOS
PC
PCL
PCH
PCLATH
PCLATU
GIE
WDT
TO
PD
C, DC, Z, OV, N ALU status bits Carry, Digit Carry, Zero, Overflow, Negative.
[
(
< >
italics
]
)
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7).
Bank Select Register. Used to select the current RAM bank.
Destination select bit
d = 0: store result in WREG,
d = 1: store result in file register f.
Destination, either the WREG register or the specified register file location.
8-bit Register file address (0x00 to 0xFF).
12-bit Register file address (0x000 to 0xFFF). This is the source address.
12-bit Register file address (0x000 to 0xFFF). This is the destination address.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
Label name.
The mode of the TBLPTR register for the Table Read and Table Write instructions.
Only used with Table Read and Table Write instructions:
The relative address (2’s complement number) for relative branch instructions, or the direct address for
Call/Branch and Return instructions.
Product of Multiply high byte.
Product of Multiply low byte.
Fast Call/Return mode select bit
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
Unused or Unchanged.
Working register (accumulator).
Don't care (0 or 1).
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
21-bit Table Pointer (points to a Program Memory location).
8-bit Table Latch.
Top-of-Stack.
Program Counter.
Program Counter Low Byte.
Program Counter High Byte.
Program Counter High Byte Latch.
Program Counter Upper Byte Latch.
Global Interrupt Enable bit.
Watchdog Timer.
Time-out bit.
Power-down bit.
Optional.
Contents.
Assigned to.
Register bit field.
In the set of.
User defined term (font is courier).
No Change to register (such as TBLPTR with Table Reads and Writes).
Post-Increment register (such as TBLPTR with Table Reads and Writes).
Post-Decrement register (such as TBLPTR with Table Reads and Writes).
Pre-Increment register (such as TBLPTR with Table Reads and Writes).
Preliminary
Description
 2002 Microchip Technology Inc.

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