ATMEGA325-16MI Atmel, ATMEGA325-16MI Datasheet
ATMEGA325-16MI
Specifications of ATMEGA325-16MI
Related parts for ATMEGA325-16MI
ATMEGA325-16MI Summary of contents
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... Fully Static Operation – MIPS Throughput at 16MHz – On-Chip 2-cycle Multiplier • High Endurance Non-volatile Memory Segments – In-System Self-programmable Flash Program Memory • 32KBytes (ATmega325/ATmega3250) • 64KBytes (ATmega645/ATmega6450) – EEPROM • 1Kbytes (ATmega325/ATmega3250) • 2Kbytes (ATmega645/ATmega6450) – Internal SRAM • ...
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... Pin Configurations Figure 1-1. Pinout ATmega3250/6450 1 DNC 2 (RXD/PCINT0) PE0 3 (TXD/PCINT1) PE1 4 (XCK/AIN0/PCINT2) PE2 (AIN1/PCINT3) PE3 5 6 (USCK/SCL/PCINT4) PE4 7 (DI/SDA/PCINT5) PE5 8 (DO/PCINT6) PE6 9 (CLKO/PCINT7) PE7 10 VCC 11 GND 12 DNC (PCINT24) PJ0 13 14 (PCINT25) PJ1 15 DNC 16 DNC 17 DNC 18 DNC 19 (SS/PCINT8) PB0 20 (SCK/PCINT9) PB1 (MOSI/PCINT10) PB2 ...
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... Figure 1-2. Pinout ATmega325/645 DNC 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) PB3 13 (OC0A/PCINT12) PB4 14 (OC1A/PCINT13) PB5 15 (OC1B/PCINT14) PB6 16 Note: 2570MS–AVR–04/11 INDEX CORNER ...
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... Overview The Atmel ATmega325/3250/645/6450 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the Atmel ATmega325/3250/645/6450 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ...
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... Self-Programmable Flash on a monolithic chip, the Atmel Atmel ATmega325/3250/645/6450 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The Atmel ATmega325/3250/645/6450 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ...
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... The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B has better driving capabilities than the other ports ATmega325/3250/645/6450 as listed on 2.3.5 Port C (PC7..PC0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability ...
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... As inputs, Port J pins that are externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port J also serves the functions of various special features of the ATmega3250/6450 as listed on page 71. ...
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... Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 2570MS–AVR–04/11 , even if the ADC is not used. If the ADC is used, it should be connected ATmega325/3250/645/6450 CC 8 ...
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... Reserved - (0xD1) Reserved - (0xD0) Reserved - (0xCF) Reserved - (0xCE) Reserved - (0xCD) Reserved - (0xCC) Reserved - (0xCB) Reserved - (0xCA) Reserved - (0xC9) Reserved - (0xC8) Reserved - (0xC7) UDR0 (0xC6) UBRR0H (0xC5) UBRR0L (0xC4) 2570MS–AVR–04/11 Registers with bold type only available in ATmega3250/6450. Bit 6 Bit 5 Bit ...
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... Timer/Counter1 Output Compare Register B High Timer/Counter1 Output Compare Register B Low Timer/Counter1 Output Compare Register A High Timer/Counter1 Output Compare Register A Low Timer/Counter1 Input Capture Register High Timer/Counter1 Input Capture Register Low Timer/Counter1 High ATmega325/3250/645/6450 Bit 3 Bit 2 Bit USBS0 UCSZ01 UCSZ00 UCPOL0 ...
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... OCDR6 OCDR5 OCDR4 ACBG ACO ACI - - - SPI Data Register WCOL - - SPE DORD MSTR General Purpose I/O Register General Purpose I/O Register - - - - - - Timer/Counter0 Output Compare A Timer/Counter0 ATmega325/3250/645/6450 Bit 3 Bit 2 Bit WGM12 CS12 CS11 - - WGM11 - - AIN1D ADC3D ADC2D ADC1D - - - MUX3 MUX2 MUX1 ...
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... Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel ATmega325/3250/645/6450 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 2570MS– ...
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... Branch if Less Than Zero, Signed BRHS k Branch if Half Carry Flag Set BRHC k Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set 2570MS–AVR–04/11 ATmega325/3250/645/6450 Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← Rd • ← ...
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... Load Program Memory LPM Rd, Z Load Program Memory LPM Rd, Z+ Load Program Memory and Post-Inc SPM Store Program Memory 2570MS–AVR–04/11 ATmega325/3250/645/6450 Description then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← ...
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... Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2570MS–AVR–04/11 ATmega325/3250/645/6450 Description Rd ← ← Rr STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only Operation Flags ...
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... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570MS–AVR–04/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega325V-8AU 64A (4) ATmega325V-8AUR 64A ATmega325V-8MU 64M1 (4) ATmega325V-8MUR 64M1 ATmega325-16AU 64A (4) ATmega325-16AUR 64A ATmega325-16MU 64M1 (4) ATmega325-16MUR 64M1 and Figure 27-2 on page 299. Package Type (1) Operational Range Industrial 0° ...
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... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570MS–AVR–04/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega3250V-8AU 100A (4) ATmega3250V-8AUR 100A ATmega3250-16AU 100A (4) ATmega3250-16AUR 100A and Figure 27-2 on page 299. Package Type (1) Operational Range Industrial 0°C to 85°C) ...
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... Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570MS–AVR–04/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega645V-8AU 64A ...
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... Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570MS–AVR–04/11 ATmega325/3250/645/6450 (2) Ordering Code Package Type ATmega6450V-8AU 100A ...
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... San Jose, CA 95131 R 2570MS–AVR–04/11 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega325/3250/645/6450 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – 0. ...
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... Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega325/3250/645/6450 C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A ...
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... Orchard Parkway San Jose, CA 95131 R 2570MS–AVR–04/11 B PIN 1 IDENTIFIER TITLE 100A, 100-lead Body Size, 1.0 mm Body Thickness, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega325/3250/645/6450 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...
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... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 9.2 Errata ATmega3250 The revision letter in this section refers to the revision of the ATmega3250 device. 9.2.1 ATmega3250 Rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1 ...
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... ATmega3250 Rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00. ...
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... Updated Table 14-2 on page 97, 124, Table 16-5 on page 125, Table 17-2 on page 143 144. Updated “Fast PWM Mode” on page ATmega325/3250/645/6450 to include the “Tape & Reel” 281. 299. 301. 304. Table 14-4 on page 97, Table 16-3 on page and Table 17-4 on page 115 ...
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... ACBG: Analog Comparator Bandgap Select” on page Updated Features in “Analog to Digital Converter” on page Updated “Prescaling and Conversion Timing” on page Updated “Atmel ATmega325/3250/645/6450 Boot Loader Parameters” on page 262. Updated “DC Characteristics” on page MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package QFN/MLF”. ...
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... Number” on page 225 updated. “Typical Characteristics” on page 306 “DC Characteristics” on page 297 “Alternate Functions of Port G” on page 76 Updated “Ordering Information” on page Initial revision. ATmega325/3250/645/6450 and Figure 26-5 on page 276. 271. 311. 343. updated. “8-bit Timer/Counter0 with PWM” on page ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...