CY8C26443-24PI Cypress Semiconductor Corp, CY8C26443-24PI Datasheet - Page 82

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CY8C26443-24PI

Manufacturer Part Number
CY8C26443-24PI
Description
IC MCU 16K FLASH 256B 28-DIP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet

Specifications of CY8C26443-24PI

Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
PDIP
Screening Level
Industrial
Pin Count
28
Mounting
Through Hole
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1428
428-1428-5
428-1428

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10.8.2.3
CPhase controls which internal clock phase the compar-
ator data is latched on.
CLatch controls whether the latch is active or if it is
always transparent.
CompCap controls whether the compensation capacitor
is switched in or not in the op-amp. By not switching in
the compensation capacitance, a much faster response
Table 67:
Analog Continuous Time Block 00 Control 2 Register (ACA00CR2, Address = Bank 0/1, 73h)
Analog Continuous Time Block 01 Control 2 Register (ACA01CR2, Address = Bank 0/1, 77h)
Analog Continuous Time Block 02 Control 2 Register (ACA02CR2, Address = Bank 0/1, 7Bh)
Analog Continuous Time Block 03 Control 2 Register (ACA03CR2, Address = Bank 0/1, 7Fh)
82
Bit 7 : CPhase
0 = Comparator Control latch transparent on PHI1
1 = Comparator Control latch transparent on PHI2
Bit 6 : CLatch
0 = Comparator Control latch is always transparent
1 = Comparator Control latch is active
Bit 5 : CompCap
0 = Comparator Mode
1 = Op-amp Mode
Bit [4:2] : TestMux [2:0] Select block bypass mode for testing and characterization purposes
1 0 0 = Positive Input to… ABUS0
1 0 1 = AGND to…
1 1 0 = REFLO to…
1 1 1 = REFHI to…
0 x x = All Paths Off
Bit [1:0] : Power [1:0] Encoding for selecting 1 of 4 power levels
0 0 = Off
0 1 = Low (60 µA)
1 0 = Med (150 µA)
1 1 = High (500 µA)
Bit Name
Read/
Write
Bit #
POR
Analog Continuous Time Type A Block xx Control 2 Register
Analog Continuous Time Type A Block xx Control 2 Register
CPhase
RW
7
0
ACA00
ABUS0
ABUS0
ABUS0
CLatch
RW
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
ACA01
ABUS1
ABUS1
ABUS1
ABUS1
CompCap
RW
5
0
ACA02
ABUS2
ABUS2
ABUS2
ABUS2
TestMux[2] TestMux[1] TestMux[0]
RW
4
0
can be obtained if the amplifier is being used as a com-
parator.
TestMux – selects block bypass mode for testing and
characterization purposes.
Power – encoding for selecting 1 of 4 power levels. The
blocks always power up in the off state.
ACA03
ABUS3
ABUS3
ABUS3
ABUS3
RW
3
0
RW
2
0
Power[1]
RW
1
0
September 5, 2002
Power[0]
RW
0
0

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