CY8C26643-24AI Cypress Semiconductor Corp, CY8C26643-24AI Datasheet - Page 104

• Manufacturer Part Number: CY8C26643-24AI
• Description: IC MCU 16K FLASH 256B 44LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ CY8C26xxxr

Specifications of CY8C26643-24AI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.25 V
• Data Converters: A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 428-1431; 428-1431-5; 428-1431

10.13.4 Analog Output Buffer Control Register
Table 80:
Analog Output Buffer Control Register (ABF_CR, Address = Bank 1, 62h)
10.14 Analog Modulator
The user has the capability to use the Analog Switch
Cap Type A PSoC Blocks in Columns 0 and 2 as ampli-
tude modulators. The Analog Modulator Control Register
(AMD_CR) allows the user to select the appropriate
modulating signal. When the modulating signal is low,
the polarity follows the setting of the ASign bit set in the
Analog Switch Cap Type A Control 0 Register
(ASAxxCR0). When this signal is high, the normal gain
polarity of the PSoC block is inverted.
104
Bit 7 : ACol1Mux
0 = Set column 1 input to column 1 input mux output
1 = Set column 1 input to column 0 input mux output
Bit 6 : ACol2Mux
0 = Set column 2 input to column 2 input mux output
1 = Set column 2 input to column 3 input mux output
Bit 5 : ABUF1EN Enables the analog output buffer for Analog Column 1 (Pin P0[5])
0 = Disable analog output buffer
1 = Enable analog output buffer
Bit 4 : ABUF2EN Enables the analog output buffer for Analog Column 2 (Pin P0[4])
0 = Disable analog output buffer
1 = Enable analog output buffer
Bit 3 : ABUF0EN Enables the analog output buffer for Analog Column 0 (Pin P0[3])
0 = Disable analog output buffer
1 = Enable analog output buffer
Bit 2 : ABUF3EN Enables the analog output buffer for Analog Column 3 (Pin P0[2])
0 = Disable analog output buffer
1 = Enable analog output buffer
Bit [1] : Reserved Must be left as 0
Bit [0] : PWR Determines power level of all output buffers
0 = Low output power
1 = High output power
Bit Name
Read/
Write
Bit #
POR
Analog Output Buffer Control Register
ACol1Mux
W
7
0
ACol2Mux
W
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
ABUF1EN
W
5
0
ABUF2EN
W
4
0
ABUF0EN
W
3
0
ABUF3EN
W
2
0
Reserved
1
0
--
September 5, 2002
PWR
W
0
0