CY8C26643-24AI Cypress Semiconductor Corp, CY8C26643-24AI Datasheet - Page 21

• Manufacturer Part Number: CY8C26643-24AI
• Description: IC MCU 16K FLASH 256B 44LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ CY8C26xxxr

Specifications of CY8C26643-24AI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.25 V
• Data Converters: A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 428-1431; 428-1431-5; 428-1431

2.2.3
Table 10:
1.
2.2.4
Table 11:
1.
2.2.5
Table 12:
1.
2.3
2.3.1
The result of an instruction using this addressing mode is
placed in the A register, the F register, the SP register, or
the X register, which is specified as part of the instruction
opcode. Operand 1 is an immediate value that serves as
a source for the instruction. Arithmetic instructions
September 5, 2002
Bit [7:0] : Data [7:0] 8-bit data value holds an index for any instruction that uses an indexed addressing mode
Bit #
POR
Read/
Write
Bit Name
Bit [7:0] : Data [7:0] 8-bit data value holds a pointer to the current top-of-stack
Bit #
POR
Read/
Write
Bit
Name
Bit [15:0] : Data [15:0] 16-bit data value is the low-order/high-order byte of the Program Counter
Bit Name
Read/
Write
Bit #
POR
System - not directly accessible by the user
System - not directly accessible by the user
System - not directly accessible by the user
Index Register
Stack Pointer Register
Program Counter Register
Addressing Modes
Source Immediate
Data
[15]
15
0
1
Index Register (CPU_X)
Stack Pointer Register (CPU_SP)
Program Counter Register (CPU_PC)
System
System
Data [7]
Data [7]
Data
[14]
14
0
7
0
7
0
1
1
1
Data
[13]
13
0
1
System
System
Data [6]
Data [6]
Data
[12]
12
6
0
6
0
0
1
1
1
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
Data
[11]
11
0
1
System
System
Data [5]
Data [5]
Data
[10]
5
0
5
0
10
0
1
1
1
Data
[9]
9
0
1
System
System
Data [4]
Data [4]
4
0
4
0
Data
[8]
8
0
1
require two sources. Instructions using this addressing
mode are two bytes in length.
Table 13:
1
1
Instruction
Data
Opcode
[7]
7
0
1
System
System
Data [3]
Data [3]
3
0
3
0
Data
[6]
6
0
1
Source Immediate
1
1
Immediate Value
Data
[5]
5
0
System
System
1
Data [2]
Data [2]
Operand 1
2
0
2
0
Data
[4]
4
0
1
1
1
Data
System
System
[3]
Data [1]
Data [1]
3
0
1
1
0
1
0
Data
[2]
1
1
2
0
1
CPU Architecture
Data
System
System
Data [0]
Data [0]
[1]
1
0
1
0
0
0
0
Data
1
1
[0]
0
0
1
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