W78E051C40DL Nuvoton Technology Corporation of America, W78E051C40DL Datasheet - Page 6

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W78E051C40DL

Manufacturer Part Number
W78E051C40DL
Description
IC MCU 8-BIT 4K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78E051C40DL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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Port 4
Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port
address is located at 0D8H with the same function as that of port P1, except the P4.3 and P4.2 are
alternative function pins. It can be used as general I/O pins or external interrupt input sources ( INT2 ,
Example:
5.2 Reduce EMI Emission
Because of on-chip Flash EPROM, when a program is running in internal ROM space, the ALE will be
unused. The transition of ALE will cause noise, so it can be turned off to reduce the EMI emission if it
is useless. Turning off the ALE signal transition only requires setting the bit 0 of the AUXR SFR, which
is located at 08Eh. When ALE is turned off, it will be reactivated when the program accesses external
ROM/RAM data or jumps to execute an external ROM code. The ALE signal will turn off again after it
has been completely accessed or the program returns to internal ROM code space. The AO bit in the
AUXR register, when set, disables the ALE output. In order to reduce EMI emission from oscillation
circuitry, W78E051C allows user to diminish the gain of on-chip oscillator amplifiers by using
programmer to clear the B7 bit of security register. Once B7 is set to 0, a half of gain will be
decreased. Care must be taken if user attempts to diminish the gain of oscillator amplifier, reducing a
half of gain may effect to external crystal operating improperly at high frequency above 24 MHz. The
value of R and C1, C2 may need adjustment while running at lower gain.
***AUXR - Auxiliary register (8EH)
AO: Turn off ALE output.
Power-off Flag
***PCON - Power control (87H)
POF:
GF1, GF0: These two bits are general-purpose flag bits for the user.
PD:
IDL:
The power-off flag is located at PCON.4. This bit is set when V
be used to determine if a reset is a warm boot or a cold boot if it is subsequently reset by software.
INT3 ).
-
-
P4
MOV
MOV
ORL
ANL
Power off flag. Bit is set by hardware when power on reset. It can be cleared by software
Power down mode bit. Set it to enter power down mode.
Idle mode bit. Set it to enter idle mode.
to determine chip reset is a warm boot or cold boot.
-
-
REG
P4, #0AH
A, P4
P4,#11111101B ; Clear bit P4.1
P4,#00000001B ; Set bit P4.0
0D8H
-
-
; Output data "A" through P4.0−P4.3.
; Read P4 status to Accumulator.
POF
-
- 6 -
GF1
-
W78E51C/W78E051C
DD
has been applied to the part. It can
GF0
-
PD
-
IDL
AO

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